187 		ctrl |= PM_BIT(PLLOSC);  in pll_set_rate()
218 		ctrl |= PM_BIT(PLLEN);  in pll1_mode()
224 			if (status & PM_BIT(LOCK1))  in pll1_mode()
229 		if (!(status & PM_BIT(LOCK1)))  in pll1_mode()
233 		ctrl &= ~PM_BIT(PLLEN);  in pll1_mode()
275 	WARN_ON(ctrl & PM_BIT(PLLEN));  in pll1_set_parent()
278 		ctrl &= ~PM_BIT(PLLOSC);  in pll1_set_parent()
280 		ctrl |= PM_BIT(PLLOSC);  in pll1_set_parent()
363 	if (cksel & PM_BIT(CPUDIV))  in cpu_clk_get_rate()
377 	if (control & PM_BIT(HSBDIV))  in cpu_clk_set_rate()
384 		control &= ~PM_BIT(CPUDIV);  in cpu_clk_set_rate()
391 		control = PM_BIT(CPUDIV) | PM_BFINS(CPUSEL, cpusel, control);  in cpu_clk_set_rate()
424 	if (cksel & PM_BIT(HSBDIV))  in hsb_clk_get_rate()
450 	if (cksel & PM_BIT(PBADIV))  in pba_clk_get_rate()
476 	if (cksel & PM_BIT(PBBDIV))  in pbb_clk_get_rate()
519 		control |= PM_BIT(CEN);  in genclk_mode()
521 		control &= ~PM_BIT(CEN);  in genclk_mode()
531 	if (control & PM_BIT(DIVEN))  in genclk_get_rate()
547 		control &= ~PM_BIT(DIVEN);  in genclk_set_rate()
550 		control = PM_BFINS(DIV, div, control) | PM_BIT(DIVEN);  in genclk_set_rate()
573 		control |= PM_BIT(OSCSEL);  in genclk_set_parent()
575 		control &= ~PM_BIT(OSCSEL);  in genclk_set_parent()
580 		control |= PM_BIT(PLLSEL);  in genclk_set_parent()
582 		control &= ~PM_BIT(PLLSEL);  in genclk_set_parent()
598 	if (control & PM_BIT(OSCSEL))  in genclk_init_parent()
599 		parent = (control & PM_BIT(PLLSEL)) ? &pll1 : &osc1;  in genclk_init_parent()
601 		parent = (control & PM_BIT(PLLSEL)) ? &pll0 : &osc0;  in genclk_init_parent()
2289 	if (pm_readl(MCCTRL) & PM_BIT(PLLSEL)) {  in setup_platform()
2297 	if (pm_readl(PLL0) & PM_BIT(PLLOSC))  in setup_platform()
2299 	if (pm_readl(PLL1) & PM_BIT(PLLOSC))  in setup_platform()