Lines Matching refs:x3
44 add x3, x2, #CPU_XREG_OFFSET(19)
45 stp x19, x20, [x3]
46 stp x21, x22, [x3, #16]
47 stp x23, x24, [x3, #32]
48 stp x25, x26, [x3, #48]
49 stp x27, x28, [x3, #64]
50 stp x29, lr, [x3, #80]
56 stp x19, x20, [x3, #96]
57 str x21, [x3, #112]
80 add x3, x2, #CPU_XREG_OFFSET(31) // SP_EL0
81 ldp x19, x20, [x3]
82 ldr x21, [x3, #16]
88 add x3, x2, #CPU_XREG_OFFSET(19)
89 ldp x19, x20, [x3]
90 ldp x21, x22, [x3, #16]
91 ldp x23, x24, [x3, #32]
92 ldp x25, x26, [x3, #48]
93 ldp x27, x28, [x3, #64]
94 ldp x29, lr, [x3, #80]
108 add x3, x2, #CPU_GP_REG_OFFSET(CPU_FP_REGS)
109 fpsimd_save x3, 4
115 add x3, x2, #CPU_GP_REG_OFFSET(CPU_FP_REGS)
116 fpsimd_restore x3, 4
127 add x3, x2, #CPU_XREG_OFFSET(4)
128 stp x4, x5, [x3]
129 stp x6, x7, [x3, #16]
130 stp x8, x9, [x3, #32]
131 stp x10, x11, [x3, #48]
132 stp x12, x13, [x3, #64]
133 stp x14, x15, [x3, #80]
134 stp x16, x17, [x3, #96]
135 str x18, [x3, #112]
140 add x3, x2, #CPU_XREG_OFFSET(0)
141 stp x4, x5, [x3]
142 stp x6, x7, [x3, #16]
153 add x3, x2, #CPU_XREG_OFFSET(0)
154 ldp x4, x5, [x3]
155 ldp x6, x7, [x3, #16]
160 ldp x4, x5, [x3, #32]
161 ldp x6, x7, [x3, #48]
162 ldp x8, x9, [x3, #64]
163 ldp x10, x11, [x3, #80]
164 ldp x12, x13, [x3, #96]
165 ldp x14, x15, [x3, #112]
166 ldp x16, x17, [x3, #128]
167 ldr x18, [x3, #144]
173 pop x2, x3
193 add x3, x2, #CPU_SYSREG_OFFSET(MPIDR_EL1)
218 stp x4, x5, [x3]
219 stp x6, x7, [x3, #16]
220 stp x8, x9, [x3, #32]
221 stp x10, x11, [x3, #48]
222 stp x12, x13, [x3, #64]
223 stp x14, x15, [x3, #80]
224 stp x16, x17, [x3, #96]
225 stp x18, x19, [x3, #112]
226 stp x20, x21, [x3, #128]
227 stp x22, x23, [x3, #144]
228 stp x24, x25, [x3, #160]
242 add x3, x2, #CPU_SYSREG_OFFSET(DBGBCR0_EL1)
270 str x20, [x3, #(15 * 8)]
271 str x19, [x3, #(14 * 8)]
272 str x18, [x3, #(13 * 8)]
273 str x17, [x3, #(12 * 8)]
274 str x16, [x3, #(11 * 8)]
275 str x15, [x3, #(10 * 8)]
276 str x14, [x3, #(9 * 8)]
277 str x13, [x3, #(8 * 8)]
278 str x12, [x3, #(7 * 8)]
279 str x11, [x3, #(6 * 8)]
280 str x10, [x3, #(5 * 8)]
281 str x9, [x3, #(4 * 8)]
282 str x8, [x3, #(3 * 8)]
283 str x7, [x3, #(2 * 8)]
284 str x6, [x3, #(1 * 8)]
285 str x5, [x3, #(0 * 8)]
287 add x3, x2, #CPU_SYSREG_OFFSET(DBGBVR0_EL1)
315 str x20, [x3, #(15 * 8)]
316 str x19, [x3, #(14 * 8)]
317 str x18, [x3, #(13 * 8)]
318 str x17, [x3, #(12 * 8)]
319 str x16, [x3, #(11 * 8)]
320 str x15, [x3, #(10 * 8)]
321 str x14, [x3, #(9 * 8)]
322 str x13, [x3, #(8 * 8)]
323 str x12, [x3, #(7 * 8)]
324 str x11, [x3, #(6 * 8)]
325 str x10, [x3, #(5 * 8)]
326 str x9, [x3, #(4 * 8)]
327 str x8, [x3, #(3 * 8)]
328 str x7, [x3, #(2 * 8)]
329 str x6, [x3, #(1 * 8)]
330 str x5, [x3, #(0 * 8)]
332 add x3, x2, #CPU_SYSREG_OFFSET(DBGWCR0_EL1)
360 str x20, [x3, #(15 * 8)]
361 str x19, [x3, #(14 * 8)]
362 str x18, [x3, #(13 * 8)]
363 str x17, [x3, #(12 * 8)]
364 str x16, [x3, #(11 * 8)]
365 str x15, [x3, #(10 * 8)]
366 str x14, [x3, #(9 * 8)]
367 str x13, [x3, #(8 * 8)]
368 str x12, [x3, #(7 * 8)]
369 str x11, [x3, #(6 * 8)]
370 str x10, [x3, #(5 * 8)]
371 str x9, [x3, #(4 * 8)]
372 str x8, [x3, #(3 * 8)]
373 str x7, [x3, #(2 * 8)]
374 str x6, [x3, #(1 * 8)]
375 str x5, [x3, #(0 * 8)]
377 add x3, x2, #CPU_SYSREG_OFFSET(DBGWVR0_EL1)
405 str x20, [x3, #(15 * 8)]
406 str x19, [x3, #(14 * 8)]
407 str x18, [x3, #(13 * 8)]
408 str x17, [x3, #(12 * 8)]
409 str x16, [x3, #(11 * 8)]
410 str x15, [x3, #(10 * 8)]
411 str x14, [x3, #(9 * 8)]
412 str x13, [x3, #(8 * 8)]
413 str x12, [x3, #(7 * 8)]
414 str x11, [x3, #(6 * 8)]
415 str x10, [x3, #(5 * 8)]
416 str x9, [x3, #(4 * 8)]
417 str x8, [x3, #(3 * 8)]
418 str x7, [x3, #(2 * 8)]
419 str x6, [x3, #(1 * 8)]
420 str x5, [x3, #(0 * 8)]
430 add x3, x2, #CPU_SYSREG_OFFSET(MPIDR_EL1)
432 ldp x4, x5, [x3]
433 ldp x6, x7, [x3, #16]
434 ldp x8, x9, [x3, #32]
435 ldp x10, x11, [x3, #48]
436 ldp x12, x13, [x3, #64]
437 ldp x14, x15, [x3, #80]
438 ldp x16, x17, [x3, #96]
439 ldp x18, x19, [x3, #112]
440 ldp x20, x21, [x3, #128]
441 ldp x22, x23, [x3, #144]
442 ldp x24, x25, [x3, #160]
479 add x3, x2, #CPU_SYSREG_OFFSET(DBGBCR0_EL1)
485 ldr x20, [x3, #(15 * 8)]
486 ldr x19, [x3, #(14 * 8)]
487 ldr x18, [x3, #(13 * 8)]
488 ldr x17, [x3, #(12 * 8)]
489 ldr x16, [x3, #(11 * 8)]
490 ldr x15, [x3, #(10 * 8)]
491 ldr x14, [x3, #(9 * 8)]
492 ldr x13, [x3, #(8 * 8)]
493 ldr x12, [x3, #(7 * 8)]
494 ldr x11, [x3, #(6 * 8)]
495 ldr x10, [x3, #(5 * 8)]
496 ldr x9, [x3, #(4 * 8)]
497 ldr x8, [x3, #(3 * 8)]
498 ldr x7, [x3, #(2 * 8)]
499 ldr x6, [x3, #(1 * 8)]
500 ldr x5, [x3, #(0 * 8)]
523 add x3, x2, #CPU_SYSREG_OFFSET(DBGBVR0_EL1)
529 ldr x20, [x3, #(15 * 8)]
530 ldr x19, [x3, #(14 * 8)]
531 ldr x18, [x3, #(13 * 8)]
532 ldr x17, [x3, #(12 * 8)]
533 ldr x16, [x3, #(11 * 8)]
534 ldr x15, [x3, #(10 * 8)]
535 ldr x14, [x3, #(9 * 8)]
536 ldr x13, [x3, #(8 * 8)]
537 ldr x12, [x3, #(7 * 8)]
538 ldr x11, [x3, #(6 * 8)]
539 ldr x10, [x3, #(5 * 8)]
540 ldr x9, [x3, #(4 * 8)]
541 ldr x8, [x3, #(3 * 8)]
542 ldr x7, [x3, #(2 * 8)]
543 ldr x6, [x3, #(1 * 8)]
544 ldr x5, [x3, #(0 * 8)]
567 add x3, x2, #CPU_SYSREG_OFFSET(DBGWCR0_EL1)
573 ldr x20, [x3, #(15 * 8)]
574 ldr x19, [x3, #(14 * 8)]
575 ldr x18, [x3, #(13 * 8)]
576 ldr x17, [x3, #(12 * 8)]
577 ldr x16, [x3, #(11 * 8)]
578 ldr x15, [x3, #(10 * 8)]
579 ldr x14, [x3, #(9 * 8)]
580 ldr x13, [x3, #(8 * 8)]
581 ldr x12, [x3, #(7 * 8)]
582 ldr x11, [x3, #(6 * 8)]
583 ldr x10, [x3, #(5 * 8)]
584 ldr x9, [x3, #(4 * 8)]
585 ldr x8, [x3, #(3 * 8)]
586 ldr x7, [x3, #(2 * 8)]
587 ldr x6, [x3, #(1 * 8)]
588 ldr x5, [x3, #(0 * 8)]
611 add x3, x2, #CPU_SYSREG_OFFSET(DBGWVR0_EL1)
617 ldr x20, [x3, #(15 * 8)]
618 ldr x19, [x3, #(14 * 8)]
619 ldr x18, [x3, #(13 * 8)]
620 ldr x17, [x3, #(12 * 8)]
621 ldr x16, [x3, #(11 * 8)]
622 ldr x15, [x3, #(10 * 8)]
623 ldr x14, [x3, #(9 * 8)]
624 ldr x13, [x3, #(8 * 8)]
625 ldr x12, [x3, #(7 * 8)]
626 ldr x11, [x3, #(6 * 8)]
627 ldr x10, [x3, #(5 * 8)]
628 ldr x9, [x3, #(4 * 8)]
629 ldr x8, [x3, #(3 * 8)]
630 ldr x7, [x3, #(2 * 8)]
631 ldr x6, [x3, #(1 * 8)]
632 ldr x5, [x3, #(0 * 8)]
701 skip_32bit_state x3, 1f
703 add x3, x2, #CPU_SPSR_OFFSET(KVM_SPSR_ABT)
708 stp x4, x5, [x3]
709 stp x6, x7, [x3, #16]
711 add x3, x2, #CPU_SYSREG_OFFSET(DACR32_EL2)
715 stp x4, x5, [x3]
716 str x6, [x3, #16]
720 str x7, [x3, #24]
724 add x3, x2, #CPU_SYSREG_OFFSET(TEECR32_EL1)
727 stp x4, x5, [x3]
732 skip_32bit_state x3, 1f
734 add x3, x2, #CPU_SPSR_OFFSET(KVM_SPSR_ABT)
735 ldp x4, x5, [x3]
736 ldp x6, x7, [x3, #16]
742 add x3, x2, #CPU_SYSREG_OFFSET(DACR32_EL2)
743 ldp x4, x5, [x3]
744 ldr x6, [x3, #16]
750 ldr x7, [x3, #24]
755 add x3, x2, #CPU_SYSREG_OFFSET(TEECR32_EL1)
756 ldp x4, x5, [x3]
778 ldr x3, [x0, #VCPU_DEBUG_FLAGS]
779 tbnz x3, #KVM_ARM64_DEBUG_DIRTY_SHIFT, 1f
844 mrs x3, cntv_ctl_el0
845 and x3, x3, #3
850 mrs x3, cntv_cval_el0
851 str x3, [x0, #VCPU_TIMER_CNTV_CVAL]
880 ldr x3, [x2, #KVM_TIMER_CNTVOFF]
881 msr cntvoff_el2, x3
957 skip_debug_state x3, 1f
976 skip_debug_state x3, 1f
994 skip_debug_state x3, 1f
1093 ldp x2, x3, [x1]
1095 add x0, x0, x3
1098 mrs x3, esr_el2
1167 push x2, x3
1175 mrs x3, vttbr_el2 // If vttbr is valid, the 64bit guest
1176 cbnz x3, el1_trap // called HVC
1179 pop x2, x3
1196 mov x2, x3
1224 mrs x3, par_el1
1225 push x3, xzr
1239 mrs x3, par_el1
1242 tbnz x3, #0, 3f // Bail out if we failed the translation
1243 ubfx x3, x3, #12, #36 // Extract IPA
1244 lsl x3, x3, #4 // and present it like HPFAR
1247 1: mrs x3, hpfar_el2
1253 str x3, [x0, #VCPU_HPFAR_EL2]
1263 3: pop x2, x3
1270 push x2, x3