Lines Matching refs:instructions
305 The workaround promotes data cache clean instructions to
314 bool "Cortex-A53: 827319: Data cache clean instructions might cause overlapping transactions to the interconnect"
326 The workaround promotes data cache clean instructions to
348 The workaround promotes data cache clean instructions to
357 bool "Cortex-A53: 819472: Store exclusive instructions might cause data corruption"
369 The workaround promotes data cache clean instructions to
385 instructions to Write-Back memory are mixed with Device loads.
427 which fixes potentially affected ADRP instructions through the
613 bool "Emulate deprecated/obsolete ARMv8 instructions"
616 Legacy software support may require certain instructions
627 bool "Emulate SWP/SWPB instructions"
629 ARMv8 obsoletes the use of A32 SWP/SWPB instructions such that
631 emulation of these instructions for userspace using LDXR/STXR.
648 bool "Emulate CP15 Barrier instructions"
650 The CP15 barrier instructions - CP15ISB, CP15DSB, and
653 instructions instead.
656 instructions for AArch32 userspace code. When this option is