Lines Matching refs:an

229 	  but contains an NVIDIA Denver CPU complex in place of
296 	  This option adds an alternative code sequence to work around ARM
297 	  erratum 826319 on Cortex-A53 parts up to r0p2 with an AMBA 4 ACE or
298 	  AXI master interface and an L2 cache.
300 	  If a Cortex-A53 uses an AMBA AXI4 ACE interface to other processors
309 	  the kernel if an affected CPU is detected.
317 	  This option adds an alternative code sequence to work around ARM
318 	  erratum 827319 on Cortex-A53 parts up to r0p2 with an AMBA 5 CHI
319 	  master interface and an L2 cache.
330 	  the kernel if an affected CPU is detected.
338 	  This option adds an alternative code sequence to work around ARM
352 	  only patch the kernel if an affected CPU is detected.
360 	  This option adds an alternative code sequence to work around ARM
361 	  erratum 819472 on Cortex-A53 parts up to r0p1 with an L2 cache
373 	  the kernel if an affected CPU is detected.
381 	  This option adds an alternative code sequence to work around ARM
391 	  the kernel if an affected CPU is detected.
400 	  This option adds an alternative code sequence to work around ARM
403 	  When running a compat (AArch32) userspace on an affected Cortex-A53
412 	  the kernel if an affected CPU is detected.
417 	bool "Cortex-A53: 843419: A load or store might access an incorrect address"
423 	  a subsequent memory access to use an incorrect address on Cortex-A53
640 	  on an external transaction monitoring block called a global
716 	  allow the kernel to be booted as an EFI application. This