213 	p->dma_write(ccr, CCR, lch);  in omap_set_dma_priority()
227 	p->dma_write(l, CSDP, lch);  in omap_set_dma_transfer_params()
236 		p->dma_write(ccr, CCR, lch);  in omap_set_dma_transfer_params()
242 		p->dma_write(ccr, CCR2, lch);  in omap_set_dma_transfer_params()
273 		p->dma_write(val, CCR, lch);  in omap_set_dma_transfer_params()
276 	p->dma_write(elem_count, CEN, lch);  in omap_set_dma_transfer_params()
277 	p->dma_write(frame_count, CFN, lch);  in omap_set_dma_transfer_params()
289 		p->dma_write(csdp, CSDP, lch);  in omap_set_dma_write_mode()
302 		p->dma_write(l, LCH_CTRL, lch);  in omap_set_dma_channel_mode()
320 		p->dma_write(w, CSDP, lch);  in omap_set_dma_src_params()
326 	p->dma_write(l, CCR, lch);  in omap_set_dma_src_params()
328 	p->dma_write(src_start, CSSA, lch);  in omap_set_dma_src_params()
330 	p->dma_write(src_ei, CSEI, lch);  in omap_set_dma_src_params()
331 	p->dma_write(src_fi, CSFI, lch);  in omap_set_dma_src_params()
362 	p->dma_write(l, CSDP, lch);  in omap_set_dma_src_data_pack()
407 	p->dma_write(l, CSDP, lch);  in omap_set_dma_src_burst_mode()
422 		p->dma_write(l, CSDP, lch);  in omap_set_dma_dest_params()
428 	p->dma_write(l, CCR, lch);  in omap_set_dma_dest_params()
430 	p->dma_write(dest_start, CDSA, lch);  in omap_set_dma_dest_params()
432 	p->dma_write(dst_ei, CDEI, lch);  in omap_set_dma_dest_params()
433 	p->dma_write(dst_fi, CDFI, lch);  in omap_set_dma_dest_params()
445 	p->dma_write(l, CSDP, lch);  in omap_set_dma_dest_data_pack()
487 	p->dma_write(l, CSDP, lch);  in omap_set_dma_dest_burst_mode()
497 		p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, lch);  in omap_enable_channel_irq()
500 	p->dma_write(dma_chan[lch].enabled_irqs, CICR, lch);  in omap_enable_channel_irq()
506 	p->dma_write(0, CICR, lch);  in omap_disable_channel_irq()
511 		p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, lch);  in omap_disable_channel_irq()
545 	p->dma_write(l, CLNK_CTRL, lch);  in enable_lnk()
567 	p->dma_write(l, CLNK_CTRL, lch);  in disable_lnk()
581 	p->dma_write(1 << lch, IRQSTATUS_L0, lch);  in omap2_enable_irq_lch()
585 	p->dma_write(val, IRQENABLE_L0, lch);  in omap2_enable_irq_lch()
601 	p->dma_write(val, IRQENABLE_L0, lch);  in omap2_disable_irq_lch()
603 	p->dma_write(1 << lch, IRQSTATUS_L0, lch);  in omap2_disable_irq_lch()
670 		p->dma_write(dev_id | (1 << 10), CCR, free_ch);  in omap_request_dma()
672 		p->dma_write(dev_id, CCR, free_ch);  in omap_request_dma()
704 	p->dma_write(0, CCR, lch);  in omap_free_dma()
747 	p->dma_write(reg, GCR, 0);  in omap_dma_set_global_params()
777 	p->dma_write(l, CCR, lch);  in omap_dma_set_prio_lch()
805 		p->dma_write(0, CPC, lch);  in omap_start_dma()
807 		p->dma_write(0, CDAC, lch);  in omap_start_dma()
835 		p->dma_write(lch, CLNK_CTRL, lch);  in omap_start_dma()
852 	p->dma_write(l, CCR, lch);  in omap_start_dma()
876 		p->dma_write(l , OCP_SYSCONFIG, 0);  in omap_stop_dma()
880 		p->dma_write(l, CCR, lch);  in omap_stop_dma()
893 		p->dma_write(sys_cf, OCP_SYSCONFIG, lch);  in omap_stop_dma()
896 		p->dma_write(l, CCR, lch);  in omap_stop_dma()
1064 			p->dma_write(p->dma_read(CCR, lch_head) | (3 << 8),  in omap_dma_link_lch()
1152 		p->dma_write(1 << ch, IRQSTATUS_L0, ch);  in omap2_dma_handle_ch()
1172 			p->dma_write(ccr, CCR, ch);  in omap2_dma_handle_ch()
1183 	p->dma_write(status, CSR, ch);  in omap2_dma_handle_ch()
1184 	p->dma_write(1 << ch, IRQSTATUS_L0, ch);  in omap2_dma_handle_ch()
1203 		p->dma_write(status, CSR, ch);  in omap2_dma_handle_ch()
1266 	p->dma_write(omap_dma_global_context.dma_gcr, GCR, 0);  in omap_dma_global_context_restore()
1267 	p->dma_write(omap_dma_global_context.dma_ocp_sysconfig,  in omap_dma_global_context_restore()
1269 	p->dma_write(omap_dma_global_context.dma_irqenable_l0,  in omap_dma_global_context_restore()
1271 	p->dma_write(omap_dma_global_context.dma_irqenable_l1,  in omap_dma_global_context_restore()
1275 		p->dma_write(0x3 , IRQSTATUS_L0, 0);  in omap_dma_global_context_restore()