Lines Matching refs:r10

98 	stmfd	sp!, {r4 - r10, lr}
113 	mrc	p15, 0, r10, c1, c0, 2	@ Co-processor access control
115 	ldmfd	sp!, {r4 - r10, pc}
147 	mcr	p15, 0, r10, c1, c0, 2	@ Co-processor access control
194 	mrc	p15, 0, r10, c15, c0, 1		@ Read Diagnostic register
195 	teq	r4, r10				@ Already restored?
197 	mrc	p15, 0, r10, c15, c0, 0		@ Read Power register
198 	teq	r5, r10				@ Already restored?
223 	stmfd	sp!, {r6 - r10}
228 	mrc	p15, 0, r10, c9, c14, 0  @ save CP15 - PMC
229 	stmia	r0!, {r6 - r10}
230 	ldmfd	sp!, {r6 - r10}
235 	ldmia	r0!, {r6 - r10}
240 	mcr	p15, 0, r10, c9, c14, 0  @ restore CP15 - PMC
263 	mov	r10, #(1 << 0)			@ Cache/TLB ops broadcasting
270 	mov	r10, #0
280 	orreq	r0, r0, r10			@ Enable CPU-specific SMP bits
347 	and	r10, r0, #0xff000000		@ ARM?
348 	teq	r10, #0x41000000
356 	ldr	r10, =0x00000c08		@ Cortex-A8 primary part number
357 	teq	r0, r10
362 	mrceq	p15, 0, r10, c1, c0, 1		@ read aux control register
363 	orreq	r10, r10, #(1 << 6)		@ set IBE to 1
364 	mcreq	p15, 0, r10, c1, c0, 1		@ write aux control register
368 	mrceq	p15, 0, r10, c1, c0, 1		@ read aux control register
369 	orreq	r10, r10, #(1 << 5)		@ set L1NEON to 1
370 	orreq	r10, r10, #(1 << 9)		@ set PLDNOP to 1
371 	mcreq	p15, 0, r10, c1, c0, 1		@ write aux control register
375 	mrceq	p15, 1, r10, c9, c0, 2		@ read L2 cache aux ctrl register
376 	tsteq	r10, #1 << 22
377 	orreq	r10, r10, #(1 << 22)		@ set the Write Allocate disable bit
378 	mcreq	p15, 1, r10, c9, c0, 2		@ write the L2 cache aux ctrl register
383 2:	ldr	r10, =0x00000c09		@ Cortex-A9 primary part number
384 	teq	r0, r10
388 	mrcle	p15, 0, r10, c15, c0, 1		@ read diagnostic register
389 	orrle	r10, r10, #1 << 4		@ set bit #4
390 	mcrle	p15, 0, r10, c15, c0, 1		@ write diagnostic register
396 	mrceq	p15, 0, r10, c15, c0, 1		@ read diagnostic register
397 	orreq	r10, r10, #1 << 12		@ set bit #12
398 	orreq	r10, r10, #1 << 22		@ set bit #22
399 	mcreq	p15, 0, r10, c15, c0, 1		@ write diagnostic register
403 	mrceq	p15, 0, r10, c15, c0, 1		@ read diagnostic register
404 	orreq	r10, r10, #1 << 6		@ set bit #6
405 	mcreq	p15, 0, r10, c15, c0, 1		@ write diagnostic register
410 	mrclt	p15, 0, r10, c15, c0, 1		@ read diagnostic register
411 	orrlt	r10, r10, #1 << 11		@ set bit #11
412 	mcrlt	p15, 0, r10, c15, c0, 1		@ write diagnostic register
417 3:	ldr	r10, =0x00000c0f		@ Cortex-A15 primary part number
418 	teq	r0, r10
423 	mrcle	p15, 0, r10, c1, c0, 1		@ read aux control register
424 	orrle	r10, r10, #1 << 1		@ disable loop buffer
425 	mcrle	p15, 0, r10, c1, c0, 1		@ write aux control register
428 4:	mov	r10, #0
429 	mcr	p15, 0, r10, c7, c5, 0		@ I+BTB cache invalidate
431 	mcr	p15, 0, r10, c8, c7, 0		@ invalidate I + D TLBs
432 	v7_ttb_setup r10, r4, r8, r5		@ TTBCR, TTBRx setup