Lines Matching refs:r2
62 mov r2, #(16 << 5)
68 mov r2, r2, lsl r0 @ actual cache size
69 movne r2, r2, lsr #2 @ turned into # of sets
70 sub r2, r2, #(1 << 5)
71 stmia r1, {r2, r3}
156 mov r2, #VM_EXEC
168 tst r2, #VM_EXEC
189 1: tst r2, #VM_EXEC
198 tst r2, #VM_EXEC
261 mrs r2, cpsr
263 orr r3, r2, #PSR_I_BIT
267 msr cpsr_c, r2 @ restore interrupts
302 mrs r2, cpsr
309 orr r3, r2, #PSR_I_BIT
313 msr cpsr_c, r2 @ restore interrupts
338 mrs r2, cpsr
341 orr r3, r2, #PSR_I_BIT
345 msr cpsr_c, r2 @ restore interrupts
369 mrs r2, cpsr
372 orr r3, r2, #PSR_I_BIT
376 msr cpsr_c, r2 @ restore interrupts
388 cmp r2, #DMA_TO_DEVICE
402 cmp r2, #DMA_TO_DEVICE
449 mov r2, r0
458 1: mcr p15, 1, r2, c15, c9, 1 @ clean L2 entry
459 add r2, r2, #CACHE_DLINESIZE
484 mov r2, lr @ abuse r2 to preserve lr
486 @ if r2 contains the VM_EXEC bit then the next 2 ops are done already
487 tst r2, #VM_EXEC
493 ret r2