Lines Matching refs:mcr

43 	mcr	p15, 0, r0, c1, c0, 0		@ disable caches
54 	mcr	p15, 0, ip, c7, c5, 0		@ flush I cache
55 	mcr	p15, 0, ip, c7, c6, 0		@ flush D cache
56 	mcr	p15, 0, ip, c7, c10, 4		@ drain WB
60 	mcr	p15, 0, ip, c1, c0, 0		@ ctrl register
70 	mcr	p15, 0, r0, c7, c0, 4		@ Wait for interrupt
80 	mcr	p15, 0, r0, c7, c5, 0		@ invalidate I cache
112 	mcr	p15, 0, ip, c7, c6, 0		@ flush D cache
116 2:	mcr	p15, 0, r3, c7, c14, 2		@ clean/flush D index
166 2:	mcr	p15, 0, r3, c7, c14, 2		@ clean/flush D index
171 	mcr	p15, 0, r0, c7, c5, 0		@ invalidate I cache
172 	mcr	p15, 0, r0, c7, c10, 4		@ drain WB
188 2:	mcr	p15, 0, r3, c7, c6, 2		@ flush D entry
193 	mcr	p15, 0, ip, c7, c10, 4		@ drain WB
211 2:	mcr	p15, 0, r3, c7, c10, 2		@ clean D entry
217 	mcr	p15, 0, ip, c7, c10, 4		@ drain WB
235 	mcr	p15, 0, r3, c7, c14, 2		@ clean/flush D entry
237 	mcr	p15, 0, r3, c7, c6, 2		@ invalidate D entry
243 	mcr	p15, 0, ip, c7, c10, 4		@ drain WB
279 	mcr	p15, 0, r0, c7, c5, 0		@ invalidate I cache
280 	mcr	p15, 0, r0, c7, c6, 0		@ invalidate D cache
281 	mcr	p15, 0, r0, c7, c10, 4		@ drain WB
283 	mcr	p15, 0, r0, c6, c3, 0		@ disable data area 3~7
284 	mcr	p15, 0, r0, c6, c4, 0
285 	mcr	p15, 0, r0, c6, c5, 0
286 	mcr	p15, 0, r0, c6, c6, 0
287 	mcr	p15, 0, r0, c6, c7, 0
289 	mcr	p15, 0, r0, c6, c3, 1		@ disable instruction area 3~7
290 	mcr	p15, 0, r0, c6, c4, 1
291 	mcr	p15, 0, r0, c6, c5, 1
292 	mcr	p15, 0, r0, c6, c6, 1
293 	mcr	p15, 0, r0, c6, c7, 1
296 	mcr	p15, 0, r0, c6,	c0, 0		@ set area 0, default
297 	mcr	p15, 0, r0, c6,	c0, 1
302 	mcr	p15, 0, r3, c6,	c1, 0		@ set area 1, RAM
303 	mcr	p15, 0, r3, c6,	c1, 1
308 	mcr	p15, 0, r3, c6,	c2, 0		@ set area 2, ROM/FLASH
309 	mcr	p15, 0, r3, c6,	c2, 1
312 	mcr	p15, 0, r0, c2, c0, 0		@ Region 1&2 cacheable
313 	mcr	p15, 0, r0, c2, c0, 1
319 	mcr	p15, 0, r0, c3, c0, 0
323 	mcr	p15, 0, r0, c5, c0, 0		@ all read/write access
324 	mcr	p15, 0, r0, c5, c0, 1