Lines Matching refs:c7
83 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches
84 mcr p15, 0, ip, c7, c10, 4 @ drain WB
86 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
105 mcr p15, 0, r0, c7, c10, 4 @ Drain write buffer
111 mcr p15, 0, r0, c7, c0, 4 @ Wait for interrupt
123 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
146 mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache
148 1: mrc p15, 0, r15, c7, c14, 3 @ test,clean,invalidate
152 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache
153 mcrne p15, 0, ip, c7, c10, 4 @ drain WB
173 mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
174 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
176 mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
177 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
180 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D entry
181 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
183 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D entry
184 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
190 mcrne p15, 0, ip, c7, c10, 4 @ drain WB
218 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
219 mcr p15, 0, r0, c7, c5, 1 @ invalidate I entry
223 mcr p15, 0, r0, c7, c10, 4 @ drain WB
238 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
243 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
244 mcr p15, 0, r0, c7, c10, 4 @ drain WB
263 mcrne p15, 0, r0, c7, c10, 1 @ clean D entry
265 mcrne p15, 0, r1, c7, c10, 1 @ clean D entry
268 1: mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
272 mcr p15, 0, r0, c7, c10, 4 @ drain WB
288 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
293 mcr p15, 0, r0, c7, c10, 4 @ drain WB
308 mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
310 mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
315 mcr p15, 0, r0, c7, c10, 4 @ drain WB
350 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
355 mcr p15, 0, r0, c7, c10, 4 @ drain WB
372 mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache
375 1: mrc p15, 0, r15, c7, c14, 3 @ test,clean,invalidate
378 mcr p15, 0, ip, c7, c5, 0 @ invalidate I cache
379 mcr p15, 0, ip, c7, c10, 4 @ drain WB
381 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
396 mcr p15, 0, r0, c7, c10, 1 @ clean D entry
398 mcr p15, 0, r0, c7, c10, 4 @ drain WB
417 mcr p15, 0, ip, c8, c7, 0 @ invalidate I+D TLBs
418 mcr p15, 0, ip, c7, c7, 0 @ invalidate I+D caches
431 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
432 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4
434 mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4