Lines Matching refs:r9
62 and r9, r8, r7, lsl #1
63 add r6, r6, r9, lsr #1
64 and r9, r8, r7, lsl #2
65 add r6, r6, r9, lsr #2
66 and r9, r8, r7, lsl #3
67 add r6, r6, r9, lsr #3
71 and r9, r8, #15 << 16 @ Extract 'n' from instruction
72 ldr r7, [r2, r9, lsr #14] @ Get register 'Rn'
76 str r7, [r2, r9, lsr #14] @ Put register 'Rn'
83 and r9, r8, #0x00f @ get Rm / low nibble of immediate value
86 orrne r6, r9, r6, lsr #4 @ combine nibbles } else
87 ldreq r6, [r2, r9, lsl #2] @ { load Rm value }
89 and r9, r8, #15 << 16 @ Extract 'n' from instruction
90 ldr r7, [r2, r9, lsr #14] @ Get register 'Rn'
94 str r7, [r2, r9, lsr #14] @ Put register 'Rn'
103 and r9, r8, #15 << 16 @ Extract 'n' from instruction
104 ldr r7, [r2, r9, lsr #14] @ Get register 'Rn'
108 str r7, [r2, r9, lsr #14] @ Put register 'Rn'
117 mov r9, r8, lsr #7 @ get shift count
118 ands r9, r9, #31
124 mov r6, r6, lsl r9 @ 0: LSL #!0
132 mov r6, r6, lsr r9 @ 4: LSR #!0
140 mov r6, r6, asr r9 @ 8: ASR #!0
148 mov r6, r6, ror r9 @ C: ROR #!0
192 and r9, r8, #0xaa
193 add r6, r6, r9, lsr #1
194 and r9, r6, #0xcc
196 add r6, r6, r9, lsr #2
209 and r9, r8, #0xaa
210 add r6, r6, r9, lsr #1
211 and r9, r6, #0xcc
213 add r6, r6, r9, lsr #2
215 and r9, r8, #7 << 8
216 ldr r7, [r2, r9, lsr #6]
219 str r7, [r2, r9, lsr #6]