Lines Matching refs:lsr
32 add pc, pc, r7, lsr #22 @ Now branch to the relevant processing routine
63 add r6, r6, r9, lsr #1
65 add r6, r6, r9, lsr #2
67 add r6, r6, r9, lsr #3
68 add r6, r6, r6, lsr #8
69 add r6, r6, r6, lsr #4
72 ldr r7, [r2, r9, lsr #14] @ Get register 'Rn'
76 str r7, [r2, r9, lsr #14] @ Put register 'Rn'
86 orrne r6, r9, r6, lsr #4 @ combine nibbles } else
90 ldr r7, [r2, r9, lsr #14] @ Get register 'Rn'
94 str r7, [r2, r9, lsr #14] @ Put register 'Rn'
104 ldr r7, [r2, r9, lsr #14] @ Get register 'Rn'
106 subne r7, r7, r6, lsr #20 @ Undo increment
107 addeq r7, r7, r6, lsr #20 @ Undo decrement
108 str r7, [r2, r9, lsr #14] @ Put register 'Rn'
117 mov r9, r8, lsr #7 @ get shift count
132 mov r6, r6, lsr r9 @ 4: LSR #!0
134 mov r6, r6, lsr #32 @ 5: LSR #32
161 add pc, pc, r7, lsr #10 @ lookup in table
193 add r6, r6, r9, lsr #1
196 add r6, r6, r9, lsr #2
197 movs r7, r8, lsr #9 @ C = r8 bit 8 (R bit)
198 adc r6, r6, r6, lsr #4 @ high + low nibble + R bit
210 add r6, r6, r9, lsr #1
213 add r6, r6, r9, lsr #2
214 add r6, r6, r6, lsr #4
216 ldr r7, [r2, r9, lsr #6]
219 str r7, [r2, r9, lsr #6]