Lines Matching refs:ARM
141 there is no documentation on it at the ARM corporate website.
361 …bool "Support ARM V6 processor" if (!ARCH_MULTIPLATFORM || ARCH_MULTI_V6) && (ARCH_INTEGRATOR || M…
374 …bool "Support ARM V6K processor" if (!ARCH_MULTIPLATFORM || ARCH_MULTI_V6) && (ARCH_INTEGRATOR || …
388 …bool "Support ARM V7 processor" if (!ARCH_MULTIPLATFORM || ARCH_MULTI_V7) && (ARCH_INTEGRATOR || M…
412 # There are no CPUs available with MMU that don't implement an ARM ISA:
415 Select this if your CPU doesn't support the 32 bit ARM instructions.
543 ARM Architecture Version 4 TLB with writethrough cache.
548 ARM Architecture Version 4 TLB with writeback cache.
553 ARM Architecture Version 4 TLB with writeback cache and invalidate
564 Faraday ARM FA526 architecture, unified TLB with writeback cache
645 The Thumb instruction set is a compressed form of the standard ARM
663 Enable the kernel to make use of the ARM Virtualization
836 clock_gettime. Systems that implement the ARM architected
980 Setting ARM L1 cache line size to 64 Bytes.