Lines Matching refs:rate
64 .rate = 32768,
72 .rate = 26000000,
80 .rate = 48000000,
109 return clk->parent->rate * mult; in pll_recalc()
259 static int zclk_set_rate(struct clk *clk, unsigned long rate) in zclk_set_rate() argument
269 if (rate == clk_get_rate(clk->parent)) { in zclk_set_rate()
273 ret = div4_clk_ops->set_rate(clk, rate / 2); in zclk_set_rate()
288 ret = div4_clk_ops->set_rate(clk, rate); in zclk_set_rate()
298 static long zclk_round_rate(struct clk *clk, unsigned long rate) in zclk_round_rate() argument
300 unsigned long div_freq = div4_clk_ops->round_rate(clk, rate), in zclk_round_rate()
303 if (rate > div_freq && abs(parent_freq - rate) < rate - div_freq) in zclk_round_rate()
323 static int kicker_set_rate(struct clk *clk, unsigned long rate) in kicker_set_rate() argument
328 return div4_clk_ops->set_rate(clk, rate); in kicker_set_rate()
448 return clk->parent->rate; in dsiphy_recalc()
459 return clk->parent->rate / value; in dsiphy_recalc()
462 static long dsiphy_round_rate(struct clk *clk, unsigned long rate) in dsiphy_round_rate() argument
464 return clk_rate_mult_range_round(clk, 12, 33, rate); in dsiphy_round_rate()
493 static int dsiphy_set_rate(struct clk *clk, unsigned long rate) in dsiphy_set_rate() argument
498 idx = rate / clk->parent->rate; in dsiphy_set_rate()