Lines Matching refs:GPIOC_BASE
82 #define GPIOC_BASE (HX4700_ASIC3_GPIO_BASE + 32) macro
85 #define GPIOC0_LED_RED (GPIOC_BASE + 0)
86 #define GPIOC1_LED_GREEN (GPIOC_BASE + 1)
87 #define GPIOC2_LED_BLUE (GPIOC_BASE + 2)
88 #define GPIOC3_nSD_CS (GPIOC_BASE + 3)
89 #define GPIOC4_CF_nCD (GPIOC_BASE + 4) /* Input */
90 #define GPIOC5_nCIOW (GPIOC_BASE + 5) /* Output, to CF */
91 #define GPIOC6_nCIOR (GPIOC_BASE + 6) /* Output, to CF */
92 #define GPIOC7_nPCE1 (GPIOC_BASE + 7) /* Input, from CPU */
93 #define GPIOC8_nPCE2 (GPIOC_BASE + 8) /* Input, from CPU */
94 #define GPIOC9_nPOE (GPIOC_BASE + 9) /* Input, from CPU */
95 #define GPIOC10_CF_nPWE (GPIOC_BASE + 10) /* Input */
96 #define GPIOC11_PSKTSEL (GPIOC_BASE + 11) /* Input, from CPU */
97 #define GPIOC12_nPREG (GPIOC_BASE + 12) /* Input, from CPU */
98 #define GPIOC13_nPWAIT (GPIOC_BASE + 13) /* Output, to CPU */
99 #define GPIOC14_nPIOIS16 (GPIOC_BASE + 14) /* Output, to CPU */
100 #define GPIOC15_nPIOR (GPIOC_BASE + 15) /* Input, from CPU */