Lines Matching refs:r11
184 ldr r11, omap3_sdrc_dlla_ctrl
185 ldr r12, [r11]
189 str r12, [r11] @ (no OCP barrier needed)
192 ldr r11, omap3_sdrc_dlla_ctrl
193 ldr r12, [r11]
195 str r12, [r11] @ (no OCP barrier needed)
198 ldr r11, omap3_sdrc_power @ read the SDRC_POWER register
199 ldr r12, [r11] @ read the contents of SDRC_POWER
202 str r12, [r11] @ write back to SDRC_POWER register
203 ldr r12, [r11] @ posted-write barrier for SDRC
205 ldr r11, omap3_cm_iclken1_core @ read the CM_ICLKEN1_CORE reg
206 ldr r12, [r11]
208 str r12, [r11]
210 ldr r11, omap3_cm_idlest1_core
211 ldr r12, [r11]
217 ldr r11, omap3_cm_clksel1_pll
218 ldr r12, [r11]
222 str r12, [r11]
223 ldr r12, [r11] @ posted-write barrier for CM
230 ldr r11, omap3_cm_iclken1_core
231 ldr r12, [r11]
233 str r12, [r11]
235 ldr r11, omap3_cm_idlest1_core
236 ldr r12, [r11]
241 ldr r11, omap3_sdrc_power
242 str r9, [r11] @ restore SDRC_POWER, no barrier needed
245 ldr r11, omap3_sdrc_dlla_status
246 ldr r12, [r11]
252 ldr r11, omap3_sdrc_dlla_status
253 ldr r12, [r11]
260 ldr r11, omap3_sdrc_rfr_ctrl_0 @ fetch addr from SRAM
261 str r12, [r11] @ store
264 ldr r11, omap3_sdrc_actim_ctrl_a_0
265 str r12, [r11]
267 ldr r11, omap3_sdrc_actim_ctrl_b_0
268 str r12, [r11]
270 ldr r11, omap3_sdrc_mr_0
271 str r12, [r11]
276 ldr r11, omap3_sdrc_rfr_ctrl_1
277 str r12, [r11]
280 ldr r11, omap3_sdrc_actim_ctrl_a_1
281 str r12, [r11]
283 ldr r11, omap3_sdrc_actim_ctrl_b_1
284 str r12, [r11]
286 ldr r11, omap3_sdrc_mr_1
287 str r12, [r11]
290 ldr r12, [r11] @ posted-write barrier for SDRC