Lines Matching refs:PWRSTS_OFF_RET

42 		[0] = PWRSTS_OFF_RET,	/* hwa_mem */
43 		[1] = PWRSTS_OFF_RET,	/* sl2_mem */
44 		[2] = PWRSTS_OFF_RET,	/* tcm1_mem */
45 		[3] = PWRSTS_OFF_RET,	/* tcm2_mem */
48 		[0] = PWRSTS_OFF_RET,	/* hwa_mem */
49 		[1] = PWRSTS_OFF_RET,	/* sl2_mem */
50 		[2] = PWRSTS_OFF_RET,	/* tcm1_mem */
51 		[3] = PWRSTS_OFF_RET,	/* tcm2_mem */
82 		[0] = PWRSTS_OFF_RET,	/* aessmem */
83 		[1] = PWRSTS_OFF_RET,	/* periphmem */
86 		[0] = PWRSTS_OFF_RET,	/* aessmem */
87 		[1] = PWRSTS_OFF_RET,	/* periphmem */
101 		[0] = PWRSTS_OFF_RET,	/* dss_mem */
104 		[0] = PWRSTS_OFF_RET,	/* dss_mem */
115 	.pwrsts_logic_ret = PWRSTS_OFF_RET,
118 		[0] = PWRSTS_OFF_RET,	/* nonretained_bank */
119 		[1] = PWRSTS_OFF_RET,	/* retained_bank */
122 		[0] = PWRSTS_OFF_RET,	/* nonretained_bank */
123 		[1] = PWRSTS_OFF_RET,	/* retained_bank */
136 		[0] = PWRSTS_OFF_RET,	/* gpu_mem */
139 		[0] = PWRSTS_OFF_RET,	/* gpu_mem */
167 		[0] = PWRSTS_OFF_RET,	/* core_nret_bank */
168 		[1] = PWRSTS_OFF_RET,	/* core_ocmram */
169 		[2] = PWRSTS_OFF_RET,	/* core_other_bank */
170 		[3] = PWRSTS_OFF_RET,	/* ipu_l2ram */
171 		[4] = PWRSTS_OFF_RET,	/* ipu_unicache */
174 		[0] = PWRSTS_OFF_RET,	/* core_nret_bank */
175 		[1] = PWRSTS_OFF_RET,	/* core_ocmram */
176 		[2] = PWRSTS_OFF_RET,	/* core_other_bank */
177 		[3] = PWRSTS_OFF_RET,	/* ipu_l2ram */
178 		[4] = PWRSTS_OFF_RET,	/* ipu_unicache */
200 		[0] = PWRSTS_OFF_RET,	/* cpu0_l1 */
216 		[0] = PWRSTS_OFF_RET,	/* cpu1_l1 */
229 	.pwrsts_logic_ret = PWRSTS_OFF_RET,
232 		[0] = PWRSTS_OFF_RET,	/* vpe_bank */
235 		[0] = PWRSTS_OFF_RET,	/* vpe_bank */
249 		[0] = PWRSTS_OFF_RET,	/* mpu_l2 */
253 		[0] = PWRSTS_OFF_RET,	/* mpu_l2 */
254 		[1] = PWRSTS_OFF_RET,	/* mpu_ram */
264 	.pwrsts_logic_ret = PWRSTS_OFF_RET,
267 		[0] = PWRSTS_OFF_RET,	/* gmac_bank */
268 		[1] = PWRSTS_OFF_RET,	/* l3init_bank1 */
269 		[2] = PWRSTS_OFF_RET,	/* l3init_bank2 */
272 		[0] = PWRSTS_OFF_RET,	/* gmac_bank */
273 		[1] = PWRSTS_OFF_RET,	/* l3init_bank1 */
274 		[2] = PWRSTS_OFF_RET,	/* l3init_bank2 */
287 		[0] = PWRSTS_OFF_RET,	/* eve3_bank */
290 		[0] = PWRSTS_OFF_RET,	/* eve3_bank */
303 		[0] = PWRSTS_OFF_RET,	/* emu_bank */
306 		[0] = PWRSTS_OFF_RET,	/* emu_bank */
318 		[0] = PWRSTS_OFF_RET,	/* dsp2_edma */
319 		[1] = PWRSTS_OFF_RET,	/* dsp2_l1 */
320 		[2] = PWRSTS_OFF_RET,	/* dsp2_l2 */
323 		[0] = PWRSTS_OFF_RET,	/* dsp2_edma */
324 		[1] = PWRSTS_OFF_RET,	/* dsp2_l1 */
325 		[2] = PWRSTS_OFF_RET,	/* dsp2_l2 */
338 		[0] = PWRSTS_OFF_RET,	/* dsp1_edma */
339 		[1] = PWRSTS_OFF_RET,	/* dsp1_l1 */
340 		[2] = PWRSTS_OFF_RET,	/* dsp1_l2 */
343 		[0] = PWRSTS_OFF_RET,	/* dsp1_edma */
344 		[1] = PWRSTS_OFF_RET,	/* dsp1_l1 */
345 		[2] = PWRSTS_OFF_RET,	/* dsp1_l2 */
358 		[0] = PWRSTS_OFF_RET,	/* vip_bank */
361 		[0] = PWRSTS_OFF_RET,	/* vip_bank */
374 		[0] = PWRSTS_OFF_RET,	/* eve4_bank */
377 		[0] = PWRSTS_OFF_RET,	/* eve4_bank */
390 		[0] = PWRSTS_OFF_RET,	/* eve2_bank */
393 		[0] = PWRSTS_OFF_RET,	/* eve2_bank */
406 		[0] = PWRSTS_OFF_RET,	/* eve1_bank */
409 		[0] = PWRSTS_OFF_RET,	/* eve1_bank */