Lines Matching refs:context_offs
67 .context_offs = DRA7XX_RM_L3INSTR_L3_INSTR_CONTEXT_OFFSET,
81 .context_offs = DRA7XX_RM_L3MAIN1_L3_MAIN_1_CONTEXT_OFFSET,
94 .context_offs = DRA7XX_RM_L3INSTR_L3_MAIN_2_CONTEXT_OFFSET,
116 .context_offs = DRA7XX_RM_L4CFG_L4_CFG_CONTEXT_OFFSET,
168 .context_offs = DRA7XX_RM_WKUPAON_L4_WKUP_CONTEXT_OFFSET,
191 .context_offs = DRA7XX_RM_ATL_ATL_CONTEXT_OFFSET,
215 .context_offs = DRA7XX_RM_DSS_BB2D_CONTEXT_OFFSET,
250 .context_offs = DRA7XX_RM_WKUPAON_COUNTER_32K_CONTEXT_OFFSET,
306 .context_offs = DRA7XX_RM_GMAC_GMAC_CONTEXT_OFFSET,
344 .context_offs = DRA7XX_RM_WKUPAON_DCAN1_CONTEXT_OFFSET,
359 .context_offs = DRA7XX_RM_L4PER2_DCAN2_CONTEXT_OFFSET,
405 .context_offs = DRA7XX_RM_DMA_DMA_SYSTEM_CONTEXT_OFFSET,
453 .context_offs = DRA7XX_RM_DSS_DSS_CONTEXT_OFFSET,
578 .context_offs = DRA7XX_RM_L4PER_ELM_CONTEXT_OFFSET,
625 .context_offs = DRA7XX_RM_WKUPAON_GPIO1_CONTEXT_OFFSET,
648 .context_offs = DRA7XX_RM_L4PER_GPIO2_CONTEXT_OFFSET,
671 .context_offs = DRA7XX_RM_L4PER_GPIO3_CONTEXT_OFFSET,
694 .context_offs = DRA7XX_RM_L4PER_GPIO4_CONTEXT_OFFSET,
717 .context_offs = DRA7XX_RM_L4PER_GPIO5_CONTEXT_OFFSET,
740 .context_offs = DRA7XX_RM_L4PER_GPIO6_CONTEXT_OFFSET,
763 .context_offs = DRA7XX_RM_L4PER_GPIO7_CONTEXT_OFFSET,
786 .context_offs = DRA7XX_RM_L4PER_GPIO8_CONTEXT_OFFSET,
828 .context_offs = DRA7XX_RM_L3MAIN1_GPMC_CONTEXT_OFFSET,
864 .context_offs = DRA7XX_RM_L4PER_HDQ1W_CONTEXT_OFFSET,
909 .context_offs = DRA7XX_RM_L4PER_I2C1_CONTEXT_OFFSET,
926 .context_offs = DRA7XX_RM_L4PER_I2C2_CONTEXT_OFFSET,
943 .context_offs = DRA7XX_RM_L4PER_I2C3_CONTEXT_OFFSET,
960 .context_offs = DRA7XX_RM_L4PER_I2C4_CONTEXT_OFFSET,
977 .context_offs = DRA7XX_RM_IPU_I2C5_CONTEXT_OFFSET,
1011 .context_offs = DRA7XX_RM_L4CFG_MAILBOX1_CONTEXT_OFFSET,
1024 .context_offs = DRA7XX_RM_L4CFG_MAILBOX2_CONTEXT_OFFSET,
1037 .context_offs = DRA7XX_RM_L4CFG_MAILBOX3_CONTEXT_OFFSET,
1050 .context_offs = DRA7XX_RM_L4CFG_MAILBOX4_CONTEXT_OFFSET,
1063 .context_offs = DRA7XX_RM_L4CFG_MAILBOX5_CONTEXT_OFFSET,
1076 .context_offs = DRA7XX_RM_L4CFG_MAILBOX6_CONTEXT_OFFSET,
1089 .context_offs = DRA7XX_RM_L4CFG_MAILBOX7_CONTEXT_OFFSET,
1102 .context_offs = DRA7XX_RM_L4CFG_MAILBOX8_CONTEXT_OFFSET,
1115 .context_offs = DRA7XX_RM_L4CFG_MAILBOX9_CONTEXT_OFFSET,
1128 .context_offs = DRA7XX_RM_L4CFG_MAILBOX10_CONTEXT_OFFSET,
1141 .context_offs = DRA7XX_RM_L4CFG_MAILBOX11_CONTEXT_OFFSET,
1154 .context_offs = DRA7XX_RM_L4CFG_MAILBOX12_CONTEXT_OFFSET,
1167 .context_offs = DRA7XX_RM_L4CFG_MAILBOX13_CONTEXT_OFFSET,
1207 .context_offs = DRA7XX_RM_L4PER_MCSPI1_CONTEXT_OFFSET,
1228 .context_offs = DRA7XX_RM_L4PER_MCSPI2_CONTEXT_OFFSET,
1249 .context_offs = DRA7XX_RM_L4PER_MCSPI3_CONTEXT_OFFSET,
1270 .context_offs = DRA7XX_RM_L4PER_MCSPI4_CONTEXT_OFFSET,
1317 .context_offs = DRA7XX_RM_L3INIT_MMC1_CONTEXT_OFFSET,
1339 .context_offs = DRA7XX_RM_L3INIT_MMC2_CONTEXT_OFFSET,
1360 .context_offs = DRA7XX_RM_L4PER_MMC3_CONTEXT_OFFSET,
1381 .context_offs = DRA7XX_RM_L4PER_MMC4_CONTEXT_OFFSET,
1408 .context_offs = DRA7XX_RM_MPU_MPU_CONTEXT_OFFSET,
1443 .context_offs = DRA7XX_RM_L3INIT_OCP2SCP1_CONTEXT_OFFSET,
1458 .context_offs = DRA7XX_RM_L3INIT_OCP2SCP3_CONTEXT_OFFSET,
1482 .context_offs = DRA7XX_RM_L3INIT_PCIESS1_CONTEXT_OFFSET,
1497 .context_offs = DRA7XX_RM_L3INIT_PCIESS2_CONTEXT_OFFSET,
1530 .context_offs = DRA7XX_RM_L4PER2_QSPI_CONTEXT_OFFSET,
1562 .context_offs = DRA7XX_RM_RTC_RTCSS_CONTEXT_OFFSET,
1599 .context_offs = DRA7XX_RM_L3INIT_SATA_CONTEXT_OFFSET,
1644 .context_offs = DRA7XX_RM_COREAON_SMARTREFLEX_CORE_CONTEXT_OFFSET,
1665 .context_offs = DRA7XX_RM_COREAON_SMARTREFLEX_MPU_CONTEXT_OFFSET,
1702 .context_offs = DRA7XX_RM_L4CFG_SPINLOCK_CONTEXT_OFFSET,
1753 .context_offs = DRA7XX_RM_WKUPAON_TIMER1_CONTEXT_OFFSET,
1768 .context_offs = DRA7XX_RM_L4PER_TIMER2_CONTEXT_OFFSET,
1783 .context_offs = DRA7XX_RM_L4PER_TIMER3_CONTEXT_OFFSET,
1798 .context_offs = DRA7XX_RM_L4PER_TIMER4_CONTEXT_OFFSET,
1813 .context_offs = DRA7XX_RM_IPU_TIMER5_CONTEXT_OFFSET,
1828 .context_offs = DRA7XX_RM_IPU_TIMER6_CONTEXT_OFFSET,
1843 .context_offs = DRA7XX_RM_IPU_TIMER7_CONTEXT_OFFSET,
1858 .context_offs = DRA7XX_RM_IPU_TIMER8_CONTEXT_OFFSET,
1873 .context_offs = DRA7XX_RM_L4PER_TIMER9_CONTEXT_OFFSET,
1888 .context_offs = DRA7XX_RM_L4PER_TIMER10_CONTEXT_OFFSET,
1903 .context_offs = DRA7XX_RM_L4PER_TIMER11_CONTEXT_OFFSET,
1918 .context_offs = DRA7XX_RM_L4PER3_TIMER13_CONTEXT_OFFSET,
1933 .context_offs = DRA7XX_RM_L4PER3_TIMER14_CONTEXT_OFFSET,
1948 .context_offs = DRA7XX_RM_L4PER3_TIMER15_CONTEXT_OFFSET,
1963 .context_offs = DRA7XX_RM_L4PER3_TIMER16_CONTEXT_OFFSET,
2001 .context_offs = DRA7XX_RM_L4PER_UART1_CONTEXT_OFFSET,
2017 .context_offs = DRA7XX_RM_L4PER_UART2_CONTEXT_OFFSET,
2033 .context_offs = DRA7XX_RM_L4PER_UART3_CONTEXT_OFFSET,
2049 .context_offs = DRA7XX_RM_L4PER_UART4_CONTEXT_OFFSET,
2065 .context_offs = DRA7XX_RM_L4PER_UART5_CONTEXT_OFFSET,
2081 .context_offs = DRA7XX_RM_IPU_UART6_CONTEXT_OFFSET,
2097 .context_offs = DRA7XX_RM_L4PER2_UART7_CONTEXT_OFFSET,
2113 .context_offs = DRA7XX_RM_L4PER2_UART8_CONTEXT_OFFSET,
2129 .context_offs = DRA7XX_RM_L4PER2_UART9_CONTEXT_OFFSET,
2145 .context_offs = DRA7XX_RM_WKUPAON_UART10_CONTEXT_OFFSET,
2185 .context_offs = DRA7XX_RM_L3INIT_USB_OTG_SS1_CONTEXT_OFFSET,
2206 .context_offs = DRA7XX_RM_L3INIT_USB_OTG_SS2_CONTEXT_OFFSET,
2223 .context_offs = DRA7XX_RM_L3INIT_USB_OTG_SS3_CONTEXT_OFFSET,
2238 .context_offs = DRA7XX_RM_L3INIT_USB_OTG_SS4_CONTEXT_OFFSET,
2262 .context_offs = DRA7XX_RM_L3MAIN1_VCP1_CONTEXT_OFFSET,
2276 .context_offs = DRA7XX_RM_L3MAIN1_VCP2_CONTEXT_OFFSET,
2313 .context_offs = DRA7XX_RM_WKUPAON_WD_TIMER2_CONTEXT_OFFSET,