53 static void __iomem *sar_base;  variable
77 	writel_relaxed(val, sar_base + offset + (idx * 4));  in sar_writel()
222 	writel_relaxed(val, sar_base + AUXCOREBOOT0_OFFSET);  in omap4_irq_save_context()
224 	writel_relaxed(val, sar_base + AUXCOREBOOT1_OFFSET);  in omap4_irq_save_context()
228 	writel_relaxed(val, sar_base + PTMSYNCREQ_MASK_OFFSET);  in omap4_irq_save_context()
230 	writel_relaxed(val, sar_base + PTMSYNCREQ_EN_OFFSET);  in omap4_irq_save_context()
233 	val = readl_relaxed(sar_base + SAR_BACKUP_STATUS_OFFSET);  in omap4_irq_save_context()
235 	writel_relaxed(val, sar_base + SAR_BACKUP_STATUS_OFFSET);  in omap4_irq_save_context()
255 	writel_relaxed(val, sar_base + OMAP5_AUXCOREBOOT0_OFFSET);  in omap5_irq_save_context()
257 	writel_relaxed(val, sar_base + OMAP5_AUXCOREBOOT1_OFFSET);  in omap5_irq_save_context()
260 	val = readl_relaxed(sar_base + OMAP5_SAR_BACKUP_STATUS_OFFSET);  in omap5_irq_save_context()
262 	writel_relaxed(val, sar_base + OMAP5_SAR_BACKUP_STATUS_OFFSET);  in omap5_irq_save_context()
276 	if (!sar_base)  in irq_save_context()
277 		sar_base = omap4_get_sar_ram_base();  in irq_save_context()
296 	val = readl_relaxed(sar_base + offset);  in irq_sar_clear()
298 	writel_relaxed(val, sar_base + offset);  in irq_sar_clear()