46 	u32 v;  in _omap3_dpll_write_clken()  local
50 	v = omap2_clk_readl(clk, dd->control_reg);  in _omap3_dpll_write_clken()
51 	v &= ~dd->enable_mask;  in _omap3_dpll_write_clken()
52 	v |= clken_bits << __ffs(dd->enable_mask);  in _omap3_dpll_write_clken()
53 	omap2_clk_writel(v, clk, dd->control_reg);  in _omap3_dpll_write_clken()
301 	u32 v;  in omap3_noncore_dpll_program()  local
311 		v = omap2_clk_readl(clk, dd->control_reg);  in omap3_noncore_dpll_program()
312 		v &= ~dd->freqsel_mask;  in omap3_noncore_dpll_program()
313 		v |= freqsel << __ffs(dd->freqsel_mask);  in omap3_noncore_dpll_program()
314 		omap2_clk_writel(v, clk, dd->control_reg);  in omap3_noncore_dpll_program()
318 	v = omap2_clk_readl(clk, dd->mult_div1_reg);  in omap3_noncore_dpll_program()
323 			v |= dd->dcc_mask; /* Enable DCC */  in omap3_noncore_dpll_program()
325 			v &= ~dd->dcc_mask; /* Disable DCC */  in omap3_noncore_dpll_program()
328 	v &= ~(dd->mult_mask | dd->div1_mask);  in omap3_noncore_dpll_program()
329 	v |= dd->last_rounded_m << __ffs(dd->mult_mask);  in omap3_noncore_dpll_program()
330 	v |= (dd->last_rounded_n - 1) << __ffs(dd->div1_mask);  in omap3_noncore_dpll_program()
335 		v &= ~(dd->dco_mask);  in omap3_noncore_dpll_program()
336 		v |= dco << __ffs(dd->dco_mask);  in omap3_noncore_dpll_program()
341 		v &= ~(dd->sddiv_mask);  in omap3_noncore_dpll_program()
342 		v |= sd_div << __ffs(dd->sddiv_mask);  in omap3_noncore_dpll_program()
345 	omap2_clk_writel(v, clk, dd->mult_div1_reg);  in omap3_noncore_dpll_program()
349 		v = omap2_clk_readl(clk, dd->control_reg);  in omap3_noncore_dpll_program()
353 				v |= dd->m4xen_mask;  in omap3_noncore_dpll_program()
355 				v &= ~dd->m4xen_mask;  in omap3_noncore_dpll_program()
360 				v |= dd->lpmode_mask;  in omap3_noncore_dpll_program()
362 				v &= ~dd->lpmode_mask;  in omap3_noncore_dpll_program()
365 		omap2_clk_writel(v, clk, dd->control_reg);  in omap3_noncore_dpll_program()
624 	u32 v;  in omap3_dpll_autoidle_read()  local
634 	v = omap2_clk_readl(clk, dd->autoidle_reg);  in omap3_dpll_autoidle_read()
635 	v &= dd->autoidle_mask;  in omap3_dpll_autoidle_read()
636 	v >>= __ffs(dd->autoidle_mask);  in omap3_dpll_autoidle_read()
638 	return v;  in omap3_dpll_autoidle_read()
653 	u32 v;  in omap3_dpll_allow_idle()  local
668 	v = omap2_clk_readl(clk, dd->autoidle_reg);  in omap3_dpll_allow_idle()
669 	v &= ~dd->autoidle_mask;  in omap3_dpll_allow_idle()
670 	v |= DPLL_AUTOIDLE_LOW_POWER_STOP << __ffs(dd->autoidle_mask);  in omap3_dpll_allow_idle()
671 	omap2_clk_writel(v, clk, dd->autoidle_reg);  in omap3_dpll_allow_idle()
684 	u32 v;  in omap3_dpll_deny_idle()  local
694 	v = omap2_clk_readl(clk, dd->autoidle_reg);  in omap3_dpll_deny_idle()
695 	v &= ~dd->autoidle_mask;  in omap3_dpll_deny_idle()
696 	v |= DPLL_AUTOIDLE_DISABLE << __ffs(dd->autoidle_mask);  in omap3_dpll_deny_idle()
697 	omap2_clk_writel(v, clk, dd->autoidle_reg);  in omap3_dpll_deny_idle()
741 	u32 v;  in omap3_clkoutx2_recalc()  local
756 	v = omap2_clk_readl(pclk, dd->control_reg) & dd->enable_mask;  in omap3_clkoutx2_recalc()
757 	v >>= __ffs(dd->enable_mask);  in omap3_clkoutx2_recalc()
758 	if ((v != OMAP3XXX_EN_DPLL_LOCKED) || (dd->flags & DPLL_J_TYPE))  in omap3_clkoutx2_recalc()
775 	u32 v;  in omap3_clkoutx2_round_rate()  local
796 	v = omap2_clk_readl(pclk, dd->control_reg) & dd->enable_mask;  in omap3_clkoutx2_round_rate()
797 	v >>= __ffs(dd->enable_mask);  in omap3_clkoutx2_round_rate()
800 	if (v != OMAP3XXX_EN_DPLL_LOCKED)  in omap3_clkoutx2_round_rate()