Lines Matching defs:qmgr_regs
47 struct qmgr_regs { struct
48 u32 acc[QUEUES][MAX_QUEUE_LENGTH]; /* 0x000 - 0x3FF */
49 u32 stat1[4]; /* 0x400 - 0x40F */
50 u32 stat2[2]; /* 0x410 - 0x417 */
51 u32 statne_h; /* 0x418 - queue nearly empty */
52 u32 statf_h; /* 0x41C - queue full */
53 u32 irqsrc[4]; /* 0x420 - 0x42F IRC source */
54 u32 irqen[2]; /* 0x430 - 0x437 IRQ enabled */
55 u32 irqstat[2]; /* 0x438 - 0x43F - IRQ access only */
56 u32 reserved[1776];
57 u32 sram[2048]; /* 0x2000 - 0x3FFF - config and buffer */
89 struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT; in qmgr_put_entry() local
102 const struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT; in qmgr_get_entry() local
115 const struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT; in __qmgr_get_stat1() local
122 const struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT; in __qmgr_get_stat2() local
148 const struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT; in qmgr_stat_below_low_watermark() local
175 const struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT; in qmgr_stat_full() local