250 	} u_desc_ctrl;  in iop_desc_init_memcpy()  local
252 	u_desc_ctrl.value = 0;  in iop_desc_init_memcpy()
253 	u_desc_ctrl.field.xfer_dir = 3; /* local to internal bus */  in iop_desc_init_memcpy()
254 	u_desc_ctrl.field.int_en = flags & DMA_PREP_INTERRUPT;  in iop_desc_init_memcpy()
255 	hw_desc->desc_ctrl = u_desc_ctrl.value;  in iop_desc_init_memcpy()
266 	} u_desc_ctrl;  in iop_desc_init_memset()  local
268 	u_desc_ctrl.value = 0;  in iop_desc_init_memset()
269 	u_desc_ctrl.field.xfer_dir = 3; /* local to internal bus */  in iop_desc_init_memset()
270 	u_desc_ctrl.field.block_fill_en = 1;  in iop_desc_init_memset()
271 	u_desc_ctrl.field.int_en = flags & DMA_PREP_INTERRUPT;  in iop_desc_init_memset()
272 	hw_desc->desc_ctrl = u_desc_ctrl.value;  in iop_desc_init_memset()
285 	} u_desc_ctrl;  in iop_desc_init_xor()  local
287 	u_desc_ctrl.value = 0;  in iop_desc_init_xor()
288 	u_desc_ctrl.field.src_select = src_cnt - 1;  in iop_desc_init_xor()
289 	u_desc_ctrl.field.xfer_dir = 3; /* local to internal bus */  in iop_desc_init_xor()
290 	u_desc_ctrl.field.int_en = flags & DMA_PREP_INTERRUPT;  in iop_desc_init_xor()
291 	hw_desc->desc_ctrl = u_desc_ctrl.value;  in iop_desc_init_xor()
306 	} u_desc_ctrl;  in iop_desc_init_zero_sum()  local
308 	u_desc_ctrl.value = 0;  in iop_desc_init_zero_sum()
309 	u_desc_ctrl.field.src_select = src_cnt - 1;  in iop_desc_init_zero_sum()
310 	u_desc_ctrl.field.xfer_dir = 3; /* local to internal bus */  in iop_desc_init_zero_sum()
311 	u_desc_ctrl.field.zero_result = 1;  in iop_desc_init_zero_sum()
312 	u_desc_ctrl.field.status_write_back_en = 1;  in iop_desc_init_zero_sum()
313 	u_desc_ctrl.field.int_en = flags & DMA_PREP_INTERRUPT;  in iop_desc_init_zero_sum()
314 	hw_desc->desc_ctrl = u_desc_ctrl.value;  in iop_desc_init_zero_sum()
328 	} u_desc_ctrl;  in iop_desc_init_pq()  local
330 	u_desc_ctrl.value = 0;  in iop_desc_init_pq()
331 	u_desc_ctrl.field.src_select = src_cnt - 1;  in iop_desc_init_pq()
332 	u_desc_ctrl.field.xfer_dir = 3; /* local to internal bus */  in iop_desc_init_pq()
333 	u_desc_ctrl.field.pq_xfer_en = 1;  in iop_desc_init_pq()
334 	u_desc_ctrl.field.p_xfer_dis = !!(flags & DMA_PREP_PQ_DISABLE_P);  in iop_desc_init_pq()
335 	u_desc_ctrl.field.int_en = flags & DMA_PREP_INTERRUPT;  in iop_desc_init_pq()
336 	hw_desc->desc_ctrl = u_desc_ctrl.value;  in iop_desc_init_pq()
347 	} u_desc_ctrl;  in iop_desc_init_pq_zero_sum()  local
349 	u_desc_ctrl.value = 0;  in iop_desc_init_pq_zero_sum()
350 	u_desc_ctrl.field.src_select = src_cnt - 1;  in iop_desc_init_pq_zero_sum()
351 	u_desc_ctrl.field.xfer_dir = 3; /* local to internal bus */  in iop_desc_init_pq_zero_sum()
352 	u_desc_ctrl.field.zero_result = 1;  in iop_desc_init_pq_zero_sum()
353 	u_desc_ctrl.field.status_write_back_en = 1;  in iop_desc_init_pq_zero_sum()
354 	u_desc_ctrl.field.pq_xfer_en = 1;  in iop_desc_init_pq_zero_sum()
355 	u_desc_ctrl.field.p_xfer_dis = !!(flags & DMA_PREP_PQ_DISABLE_P);  in iop_desc_init_pq_zero_sum()
356 	u_desc_ctrl.field.int_en = flags & DMA_PREP_INTERRUPT;  in iop_desc_init_pq_zero_sum()
357 	hw_desc->desc_ctrl = u_desc_ctrl.value;  in iop_desc_init_pq_zero_sum()