103 	unsigned int idx = d->hwirq / 32;  in imx_gpc_irq_set_wake()
106 	mask = 1 << d->hwirq % 32;  in imx_gpc_irq_set_wake()
138 void imx_gpc_hwirq_unmask(unsigned int hwirq)  in imx_gpc_hwirq_unmask()  argument
143 	reg = gpc_base + GPC_IMR1 + hwirq / 32 * 4;  in imx_gpc_hwirq_unmask()
145 	val &= ~(1 << hwirq % 32);  in imx_gpc_hwirq_unmask()
149 void imx_gpc_hwirq_mask(unsigned int hwirq)  in imx_gpc_hwirq_mask()  argument
154 	reg = gpc_base + GPC_IMR1 + hwirq / 32 * 4;  in imx_gpc_hwirq_mask()
156 	val |= 1 << (hwirq % 32);  in imx_gpc_hwirq_mask()
162 	imx_gpc_hwirq_unmask(d->hwirq);  in imx_gpc_irq_unmask()
168 	imx_gpc_hwirq_mask(d->hwirq);  in imx_gpc_irq_mask()
209 	irq_hw_number_t hwirq;  in imx_gpc_domain_alloc()  local
217 	hwirq = args->args[1];  in imx_gpc_domain_alloc()
218 	if (hwirq >= GPC_MAX_IRQS)  in imx_gpc_domain_alloc()
222 		irq_domain_set_hwirq_and_chip(domain, irq + i, hwirq + i,  in imx_gpc_domain_alloc()