62 static void __iomem *timer_base;  variable
68 	val = __raw_readl(timer_base + EPITCR);  in epit_irq_disable()
70 	__raw_writel(val, timer_base + EPITCR);  in epit_irq_disable()
77 	val = __raw_readl(timer_base + EPITCR);  in epit_irq_enable()
79 	__raw_writel(val, timer_base + EPITCR);  in epit_irq_enable()
84 	__raw_writel(EPITSR_OCIF, timer_base + EPITSR);  in epit_irq_acknowledge()
91 	return clocksource_mmio_init(timer_base + EPITCNR, "epit", c, 200, 32,  in epit_clocksource_init()
102 	tcmp = __raw_readl(timer_base + EPITCNR);  in epit_set_next_event()
104 	__raw_writel(tcmp - evt, timer_base + EPITCMPR);  in epit_set_next_event()
208 	timer_base = base;  in epit_timer_init()
213 	__raw_writel(0x0, timer_base + EPITCR);  in epit_timer_init()
215 	__raw_writel(0xffffffff, timer_base + EPITLR);  in epit_timer_init()
217 			timer_base + EPITCR);  in epit_timer_init()