94 	struct irq_chip_type *ct = gc->chip_types;  in avic_irq_suspend()  local
97 	avic_saved_mask_reg[idx] = __raw_readl(avic_base + ct->regs.mask);  in avic_irq_suspend()
98 	__raw_writel(gc->wake_active, avic_base + ct->regs.mask);  in avic_irq_suspend()
104 	struct irq_chip_type *ct = gc->chip_types;  in avic_irq_resume()  local
107 	__raw_writel(avic_saved_mask_reg[idx], avic_base + ct->regs.mask);  in avic_irq_resume()
118 	struct irq_chip_type *ct;  in avic_init_gc()  local
125 	ct = gc->chip_types;  in avic_init_gc()
126 	ct->chip.irq_mask = irq_gc_mask_clr_bit;  in avic_init_gc()
127 	ct->chip.irq_unmask = irq_gc_mask_set_bit;  in avic_init_gc()
128 	ct->chip.irq_ack = irq_gc_mask_clr_bit;  in avic_init_gc()
129 	ct->chip.irq_set_wake = irq_gc_set_wake;  in avic_init_gc()
130 	ct->chip.irq_suspend = avic_irq_suspend;  in avic_init_gc()
131 	ct->chip.irq_resume = avic_irq_resume;  in avic_init_gc()
132 	ct->regs.mask = !idx ? AVIC_INTENABLEL : AVIC_INTENABLEH;  in avic_init_gc()
133 	ct->regs.ack = ct->regs.mask;  in avic_init_gc()