Lines Matching refs:avic_base
54 static void __iomem *avic_base; variable
69 irqt = __raw_readl(avic_base + AVIC_INTTYPEL) & ~(1 << irq); in avic_set_irq_fiq()
70 __raw_writel(irqt | (!!type << irq), avic_base + AVIC_INTTYPEL); in avic_set_irq_fiq()
73 irqt = __raw_readl(avic_base + AVIC_INTTYPEH) & ~(1 << irq); in avic_set_irq_fiq()
74 __raw_writel(irqt | (!!type << irq), avic_base + AVIC_INTTYPEH); in avic_set_irq_fiq()
97 avic_saved_mask_reg[idx] = __raw_readl(avic_base + ct->regs.mask); in avic_irq_suspend()
98 __raw_writel(gc->wake_active, avic_base + ct->regs.mask); in avic_irq_suspend()
107 __raw_writel(avic_saved_mask_reg[idx], avic_base + ct->regs.mask); in avic_irq_resume()
120 gc = irq_alloc_generic_chip("mxc-avic", 1, irq_start, avic_base, in avic_init_gc()
143 nivector = __raw_readl(avic_base + AVIC_NIVECSR) >> 16; in avic_handle_irq()
162 avic_base = irqbase; in mxc_init_irq()
167 __raw_writel(0, avic_base + AVIC_INTCNTL); in mxc_init_irq()
168 __raw_writel(0x1f, avic_base + AVIC_NIMASK); in mxc_init_irq()
171 __raw_writel(0, avic_base + AVIC_INTENABLEH); in mxc_init_irq()
172 __raw_writel(0, avic_base + AVIC_INTENABLEL); in mxc_init_irq()
175 __raw_writel(0, avic_base + AVIC_INTTYPEH); in mxc_init_irq()
176 __raw_writel(0, avic_base + AVIC_INTTYPEL); in mxc_init_irq()
191 __raw_writel(0, avic_base + AVIC_NIPRIORITY(i)); in mxc_init_irq()