Lines Matching refs:CLK

323 	CLK(NULL, "ref", &ref_clk),
324 	CLK(NULL, "aux", &aux_clkin),
325 	CLK(NULL, "pll1", &pll1_clk),
326 	CLK(NULL, "pll1_sysclk", &pll1_sysclk1),
327 	CLK(NULL, "pll1_sysclk", &pll1_sysclk2),
328 	CLK(NULL, "pll1_sysclk", &pll1_sysclk3),
329 	CLK(NULL, "pll1_sysclk", &pll1_sysclk4),
330 	CLK(NULL, "pll1_sysclk", &pll1_sysclk5),
331 	CLK(NULL, "pll1_sysclk", &pll1_sysclk6),
332 	CLK(NULL, "pll1_sysclk", &pll1_sysclk8),
333 	CLK(NULL, "pll1_sysclk", &pll1_sysclk9),
334 	CLK(NULL, "pll1_sysclk", &pll1_sysclkbp),
335 	CLK(NULL, "pll1_aux", &pll1_aux_clk),
336 	CLK(NULL, "pll2", &pll2_clk),
337 	CLK(NULL, "pll2_sysclk1", &pll2_sysclk1),
338 	CLK(NULL, "dsp", &dsp_clk),
339 	CLK(NULL, "arm", &arm_clk),
340 	CLK(NULL, "edma_cc", &edma_cc_clk),
341 	CLK(NULL, "edma_tc0", &edma_tc0_clk),
342 	CLK(NULL, "edma_tc1", &edma_tc1_clk),
343 	CLK(NULL, "edma_tc2", &edma_tc2_clk),
344 	CLK(NULL, "edma_tc3", &edma_tc3_clk),
345 	CLK("serial8250.0", NULL, &uart0_clk),
346 	CLK("serial8250.1", NULL, &uart1_clk),
347 	CLK("serial8250.2", NULL, &uart2_clk),
348 	CLK("i2c_davinci.1", NULL, &i2c_clk),
349 	CLK(NULL, "gpio", &gpio_clk),
350 	CLK("davinci-mcasp.0", NULL, &mcasp0_clk),
351 	CLK("davinci-mcasp.1", NULL, &mcasp1_clk),
352 	CLK(NULL, "aemif", &aemif_clk),
353 	CLK("davinci_emac.1", NULL, &emac_clk),
354 	CLK("davinci_mdio.0", "fck", &emac_clk),
355 	CLK(NULL, "pwm0", &pwm0_clk),
356 	CLK(NULL, "pwm1", &pwm1_clk),
357 	CLK(NULL, "timer0", &timer0_clk),
358 	CLK(NULL, "timer1", &timer1_clk),
359 	CLK("davinci-wdt", NULL, &timer2_clk),
360 	CLK("palm_bk3710", NULL, &ide_clk),
361 	CLK(NULL, "vpif0", &vpif0_clk),
362 	CLK(NULL, "vpif1", &vpif1_clk),
363 	CLK(NULL, NULL, NULL),