Lines Matching refs:CLK

340 	CLK(NULL, "ref", &ref_clk),
341 	CLK(NULL, "pll1", &pll1_clk),
342 	CLK(NULL, "pll1_sysclk1", &pll1_sysclk1),
343 	CLK(NULL, "pll1_sysclk2", &pll1_sysclk2),
344 	CLK(NULL, "pll1_sysclk3", &pll1_sysclk3),
345 	CLK(NULL, "pll1_sysclk4", &pll1_sysclk4),
346 	CLK(NULL, "pll1_aux", &pll1_aux_clk),
347 	CLK(NULL, "pll1_sysclkbp", &pll1_sysclkbp),
348 	CLK(NULL, "vpss_dac", &vpss_dac_clk),
349 	CLK("vpss", "master", &vpss_master_clk),
350 	CLK("vpss", "slave", &vpss_slave_clk),
351 	CLK(NULL, "clkout1", &clkout1_clk),
352 	CLK(NULL, "clkout2", &clkout2_clk),
353 	CLK(NULL, "pll2", &pll2_clk),
354 	CLK(NULL, "pll2_sysclk1", &pll2_sysclk1),
355 	CLK(NULL, "pll2_sysclkbp", &pll2_sysclkbp),
356 	CLK(NULL, "clkout3", &clkout3_clk),
357 	CLK(NULL, "arm", &arm_clk),
358 	CLK(NULL, "mjcp", &mjcp_clk),
359 	CLK("serial8250.0", NULL, &uart0_clk),
360 	CLK("serial8250.1", NULL, &uart1_clk),
361 	CLK("serial8250.2", NULL, &uart2_clk),
362 	CLK("i2c_davinci.1", NULL, &i2c_clk),
363 	CLK("davinci-mcbsp.0", NULL, &asp0_clk),
364 	CLK("davinci-mcbsp.1", NULL, &asp1_clk),
365 	CLK("dm6441-mmc.0", NULL, &mmcsd0_clk),
366 	CLK("dm6441-mmc.1", NULL, &mmcsd1_clk),
367 	CLK("spi_davinci.0", NULL, &spi0_clk),
368 	CLK("spi_davinci.1", NULL, &spi1_clk),
369 	CLK("spi_davinci.2", NULL, &spi2_clk),
370 	CLK(NULL, "gpio", &gpio_clk),
371 	CLK(NULL, "aemif", &aemif_clk),
372 	CLK(NULL, "pwm0", &pwm0_clk),
373 	CLK(NULL, "pwm1", &pwm1_clk),
374 	CLK(NULL, "pwm2", &pwm2_clk),
375 	CLK(NULL, "pwm3", &pwm3_clk),
376 	CLK(NULL, "timer0", &timer0_clk),
377 	CLK(NULL, "timer1", &timer1_clk),
378 	CLK("davinci-wdt", NULL, &timer2_clk),
379 	CLK(NULL, "timer3", &timer3_clk),
380 	CLK(NULL, "rto", &rto_clk),
381 	CLK(NULL, "usb", &usb_clk),
382 	CLK(NULL, NULL, NULL),