Lines Matching refs:start
178 .start = DA8XX_TPCC_BASE,
184 .start = DA8XX_TPTC0_BASE,
190 .start = DA8XX_TPTC1_BASE,
196 .start = IRQ_DA8XX_CCINT0,
201 .start = IRQ_DA8XX_CCERRINT,
209 .start = DA8XX_TPCC_BASE,
215 .start = DA8XX_TPTC0_BASE,
221 .start = DA8XX_TPTC1_BASE,
227 .start = DA850_TPCC1_BASE,
233 .start = DA850_TPTC2_BASE,
239 .start = IRQ_DA8XX_CCINT0,
244 .start = IRQ_DA8XX_CCERRINT,
249 .start = IRQ_DA850_CCINT1,
254 .start = IRQ_DA850_CCERRINT1,
298 .start = DA8XX_I2C0_BASE,
303 .start = IRQ_DA8XX_I2CINT0,
318 .start = DA8XX_I2C1_BASE,
323 .start = IRQ_DA8XX_I2CINT1,
354 .start = DA8XX_WDOG_BASE,
387 .start = DA8XX_EMAC_CPPI_PORT_BASE,
392 .start = IRQ_DA8XX_C0_RX_THRESH_PULSE,
397 .start = IRQ_DA8XX_C0_RX_PULSE,
402 .start = IRQ_DA8XX_C0_TX_PULSE,
407 .start = IRQ_DA8XX_C0_MISC_PULSE,
433 .start = DA8XX_EMAC_MDIO_BASE,
460 .start = DAVINCI_DA830_MCASP1_REG_BASE,
467 .start = DAVINCI_DA830_DMA_MCASP1_AXEVT,
474 .start = DAVINCI_DA830_DMA_MCASP1_AREVT,
480 .start = IRQ_DA8XX_MCASPINT,
495 .start = DAVINCI_DA830_MCASP2_REG_BASE,
502 .start = DAVINCI_DA830_DMA_MCASP2_AXEVT,
509 .start = DAVINCI_DA830_DMA_MCASP2_AREVT,
515 .start = IRQ_DA8XX_MCASPINT,
530 .start = DAVINCI_DA8XX_MCASP0_REG_BASE,
537 .start = DAVINCI_DA8XX_DMA_MCASP0_AXEVT,
544 .start = DAVINCI_DA8XX_DMA_MCASP0_AREVT,
550 .start = IRQ_DA8XX_MCASPINT,
593 .start = DA8XX_PRUSS_MEM_BASE,
598 .start = IRQ_DA8XX_EVTOUT0,
603 .start = IRQ_DA8XX_EVTOUT1,
608 .start = IRQ_DA8XX_EVTOUT2,
613 .start = IRQ_DA8XX_EVTOUT3,
618 .start = IRQ_DA8XX_EVTOUT4,
623 .start = IRQ_DA8XX_EVTOUT5,
628 .start = IRQ_DA8XX_EVTOUT6,
633 .start = IRQ_DA8XX_EVTOUT7,
679 .start = DA8XX_LCD_CNTRL_BASE,
684 .start = IRQ_DA8XX_LCDINT,
705 .start = DA8XX_GPIO_BASE,
710 .start = IRQ_DA8XX_GPIO0,
731 .start = DA8XX_MMCSD0_BASE,
736 .start = IRQ_DA8XX_MMCSDINT0,
741 .start = DA8XX_DMA_MMCSD0_RX,
746 .start = DA8XX_DMA_MMCSD0_TX,
768 .start = DA850_MMCSD1_BASE,
773 .start = IRQ_DA850_MMCSDINT0_1,
778 .start = DA850_DMA_MMCSD1_RX,
783 .start = DA850_DMA_MMCSD1_TX,
805 .start = DA8XX_SYSCFG0_BASE + DA8XX_HOST1CFG_REG,
810 .start = DA8XX_SYSCFG0_BASE + DA8XX_CHIPSIG_REG,
815 .start = IRQ_DA8XX_CHIPINT0,
891 .start = DA8XX_RTC_BASE,
896 .start = IRQ_DA8XX_RTC,
901 .start = IRQ_DA8XX_RTC,
934 .start = DA8XX_DDR2_CTL_BASE,
964 .start = DA8XX_SPI0_BASE,
969 .start = IRQ_DA8XX_SPINT0,
974 .start = DA8XX_DMA_SPI0_RX,
979 .start = DA8XX_DMA_SPI0_TX,
987 .start = DA830_SPI1_BASE,
992 .start = IRQ_DA8XX_SPINT1,
997 .start = DA8XX_DMA_SPI1_RX,
1002 .start = DA8XX_DMA_SPI1_TX,
1050 da8xx_spi1_resources[0].start = DA850_SPI1_BASE; in da8xx_register_spi_bus()
1060 .start = DA850_SATA_BASE,
1065 .start = DA8XX_SYSCFG1_BASE + DA8XX_PWRDN_REG,
1070 .start = IRQ_DA850_SATAINT,