Lines Matching refs:end
179 .end = DA8XX_TPCC_BASE + SZ_32K - 1,
185 .end = DA8XX_TPTC0_BASE + SZ_1K - 1,
191 .end = DA8XX_TPTC1_BASE + SZ_1K - 1,
210 .end = DA8XX_TPCC_BASE + SZ_32K - 1,
216 .end = DA8XX_TPTC0_BASE + SZ_1K - 1,
222 .end = DA8XX_TPTC1_BASE + SZ_1K - 1,
228 .end = DA850_TPCC1_BASE + SZ_32K - 1,
234 .end = DA850_TPTC2_BASE + SZ_1K - 1,
299 .end = DA8XX_I2C0_BASE + SZ_4K - 1,
304 .end = IRQ_DA8XX_I2CINT0,
319 .end = DA8XX_I2C1_BASE + SZ_4K - 1,
324 .end = IRQ_DA8XX_I2CINT1,
355 .end = DA8XX_WDOG_BASE + SZ_4K - 1,
388 .end = DA8XX_EMAC_CPPI_PORT_BASE + SZ_16K - 1,
393 .end = IRQ_DA8XX_C0_RX_THRESH_PULSE,
398 .end = IRQ_DA8XX_C0_RX_PULSE,
403 .end = IRQ_DA8XX_C0_TX_PULSE,
408 .end = IRQ_DA8XX_C0_MISC_PULSE,
434 .end = DA8XX_EMAC_MDIO_BASE + SZ_4K - 1,
461 .end = DAVINCI_DA830_MCASP1_REG_BASE + (SZ_1K * 12) - 1,
468 .end = DAVINCI_DA830_DMA_MCASP1_AXEVT,
475 .end = DAVINCI_DA830_DMA_MCASP1_AREVT,
496 .end = DAVINCI_DA830_MCASP2_REG_BASE + (SZ_1K * 12) - 1,
503 .end = DAVINCI_DA830_DMA_MCASP2_AXEVT,
510 .end = DAVINCI_DA830_DMA_MCASP2_AREVT,
531 .end = DAVINCI_DA8XX_MCASP0_REG_BASE + (SZ_1K * 12) - 1,
538 .end = DAVINCI_DA8XX_DMA_MCASP0_AXEVT,
545 .end = DAVINCI_DA8XX_DMA_MCASP0_AREVT,
594 .end = DA8XX_PRUSS_MEM_BASE + 0xFFFF,
599 .end = IRQ_DA8XX_EVTOUT0,
604 .end = IRQ_DA8XX_EVTOUT1,
609 .end = IRQ_DA8XX_EVTOUT2,
614 .end = IRQ_DA8XX_EVTOUT3,
619 .end = IRQ_DA8XX_EVTOUT4,
624 .end = IRQ_DA8XX_EVTOUT5,
629 .end = IRQ_DA8XX_EVTOUT6,
634 .end = IRQ_DA8XX_EVTOUT7,
680 .end = DA8XX_LCD_CNTRL_BASE + SZ_4K - 1,
685 .end = IRQ_DA8XX_LCDINT,
706 .end = DA8XX_GPIO_BASE + SZ_4K - 1,
711 .end = IRQ_DA8XX_GPIO8,
732 .end = DA8XX_MMCSD0_BASE + SZ_4K - 1,
737 .end = IRQ_DA8XX_MMCSDINT0,
742 .end = DA8XX_DMA_MMCSD0_RX,
747 .end = DA8XX_DMA_MMCSD0_TX,
769 .end = DA850_MMCSD1_BASE + SZ_4K - 1,
774 .end = IRQ_DA850_MMCSDINT0_1,
779 .end = DA850_DMA_MMCSD1_RX,
784 .end = DA850_DMA_MMCSD1_TX,
806 .end = DA8XX_SYSCFG0_BASE + DA8XX_HOST1CFG_REG + 3,
811 .end = DA8XX_SYSCFG0_BASE + DA8XX_CHIPSIG_REG + 7,
816 .end = IRQ_DA8XX_CHIPINT0,
892 .end = DA8XX_RTC_BASE + SZ_4K - 1,
897 .end = IRQ_DA8XX_RTC,
902 .end = IRQ_DA8XX_RTC,
935 .end = DA8XX_DDR2_CTL_BASE + SZ_32K - 1,
965 .end = DA8XX_SPI0_BASE + SZ_4K - 1,
970 .end = IRQ_DA8XX_SPINT0,
975 .end = DA8XX_DMA_SPI0_RX,
980 .end = DA8XX_DMA_SPI0_TX,
988 .end = DA830_SPI1_BASE + SZ_4K - 1,
993 .end = IRQ_DA8XX_SPINT1,
998 .end = DA8XX_DMA_SPI1_RX,
1003 .end = DA8XX_DMA_SPI1_TX,
1051 da8xx_spi1_resources[0].end = DA850_SPI1_BASE + SZ_4K - 1; in da8xx_register_spi_bus()
1061 .end = DA850_SATA_BASE + 0x1fff,
1066 .end = DA8XX_SYSCFG1_BASE + DA8XX_PWRDN_REG + 0x3,