Lines Matching refs:parent
36 if (clk->parent) in __clk_enable()
37 __clk_enable(clk->parent); in __clk_enable()
58 if (clk->parent) in __clk_disable()
59 __clk_disable(clk->parent); in __clk_disable()
180 int clk_set_parent(struct clk *clk, struct clk *parent) in clk_set_parent() argument
192 clk->parent = parent; in clk_set_parent()
194 list_add(&clk->childnode, &clk->parent->children); in clk_set_parent()
212 if (WARN(clk->parent && !clk->parent->rate, in clk_register()
214 clk->name, clk->parent->name)) in clk_register()
221 if (clk->parent) in clk_register()
222 list_add_tail(&clk->childnode, &clk->parent->children); in clk_register()
234 else if (clk->parent) in clk_register()
235 clk->rate = clk->parent->rate; in clk_register()
293 if (WARN_ON(!clk->parent)) in clk_sysclk_recalc()
296 rate = clk->parent->rate; in clk_sysclk_recalc()
299 if (WARN_ON(!clk->parent->pll_data)) in clk_sysclk_recalc()
302 pll = clk->parent->pll_data; in clk_sysclk_recalc()
333 if (WARN_ON(!clk->parent)) in davinci_set_sysclk_rate()
337 if (WARN_ON(!clk->parent->pll_data)) in davinci_set_sysclk_rate()
344 pll = clk->parent->pll_data; in davinci_set_sysclk_rate()
346 input = clk->parent->rate; in davinci_set_sysclk_rate()
396 if (WARN_ON(!clk->parent)) in clk_leafclk_recalc()
399 return clk->parent->rate; in clk_leafclk_recalc()
416 rate = pll->input_rate = clk->parent->rate; in clk_pllclk_recalc()
455 pll->num, clk->parent->rate / 1000000); in clk_pllclk_recalc()
598 else if (clk->parent) in davinci_clk_init()
646 dump_clock(struct seq_file *s, unsigned nest, struct clk *parent) in dump_clock() argument
653 if (parent->flags & CLK_PLL) in dump_clock()
655 else if (parent->flags & CLK_PSC) in dump_clock()
663 i = strlen(parent->name); in dump_clock()
664 memcpy(buf + nest, parent->name, in dump_clock()
668 buf, parent->usecount, state, clk_get_rate(parent)); in dump_clock()
672 list_for_each_entry(clk, &parent->children, childnode) { in dump_clock()
686 if (!clk->parent) in davinci_ck_show()