27 					struct sam9_smc_config *config)  in sam9_smc_cs_write_mode()  argument
29 	__raw_writel(config->mode  in sam9_smc_cs_write_mode()
30 		   | AT91_SMC_TDF_(config->tdf_cycles),  in sam9_smc_cs_write_mode()
35 					struct sam9_smc_config *config)  in sam9_smc_write_mode()  argument
37 	sam9_smc_cs_write_mode(AT91_SMC_CS(id, cs), config);  in sam9_smc_write_mode()
42 					struct sam9_smc_config *config)  in sam9_smc_cs_configure()  argument
46 	__raw_writel(AT91_SMC_NWESETUP_(config->nwe_setup)  in sam9_smc_cs_configure()
47 		   | AT91_SMC_NCS_WRSETUP_(config->ncs_write_setup)  in sam9_smc_cs_configure()
48 		   | AT91_SMC_NRDSETUP_(config->nrd_setup)  in sam9_smc_cs_configure()
49 		   | AT91_SMC_NCS_RDSETUP_(config->ncs_read_setup),  in sam9_smc_cs_configure()
53 	__raw_writel(AT91_SMC_NWEPULSE_(config->nwe_pulse)  in sam9_smc_cs_configure()
54 		   | AT91_SMC_NCS_WRPULSE_(config->ncs_write_pulse)  in sam9_smc_cs_configure()
55 		   | AT91_SMC_NRDPULSE_(config->nrd_pulse)  in sam9_smc_cs_configure()
56 		   | AT91_SMC_NCS_RDPULSE_(config->ncs_read_pulse),  in sam9_smc_cs_configure()
60 	__raw_writel(AT91_SMC_NWECYCLE_(config->write_cycle)  in sam9_smc_cs_configure()
61 		   | AT91_SMC_NRDCYCLE_(config->read_cycle),  in sam9_smc_cs_configure()
65 	sam9_smc_cs_write_mode(base, config);  in sam9_smc_cs_configure()
69 					struct sam9_smc_config *config)  in sam9_smc_configure()  argument
71 	sam9_smc_cs_configure(AT91_SMC_CS(id, cs), config);  in sam9_smc_configure()
76 					struct sam9_smc_config *config)  in sam9_smc_cs_read_mode()  argument
80 	config->mode = (val & ~AT91_SMC_NWECYCLE);  in sam9_smc_cs_read_mode()
81 	config->tdf_cycles = (val & AT91_SMC_NWECYCLE) >> 16 ;  in sam9_smc_cs_read_mode()
85 					struct sam9_smc_config *config)  in sam9_smc_read_mode()  argument
87 	sam9_smc_cs_read_mode(AT91_SMC_CS(id, cs), config);  in sam9_smc_read_mode()
92 					struct sam9_smc_config *config)  in sam9_smc_cs_read()  argument
99 	config->nwe_setup = val & AT91_SMC_NWESETUP;  in sam9_smc_cs_read()
100 	config->ncs_write_setup = (val & AT91_SMC_NCS_WRSETUP) >> 8;  in sam9_smc_cs_read()
101 	config->nrd_setup = (val & AT91_SMC_NRDSETUP) >> 16;  in sam9_smc_cs_read()
102 	config->ncs_read_setup = (val & AT91_SMC_NCS_RDSETUP) >> 24;  in sam9_smc_cs_read()
107 	config->nwe_pulse = val & AT91_SMC_NWEPULSE;  in sam9_smc_cs_read()
108 	config->ncs_write_pulse = (val & AT91_SMC_NCS_WRPULSE) >> 8;  in sam9_smc_cs_read()
109 	config->nrd_pulse = (val & AT91_SMC_NRDPULSE) >> 16;  in sam9_smc_cs_read()
110 	config->ncs_read_pulse = (val & AT91_SMC_NCS_RDPULSE) >> 24;  in sam9_smc_cs_read()
115 	config->write_cycle = val & AT91_SMC_NWECYCLE;  in sam9_smc_cs_read()
116 	config->read_cycle = (val & AT91_SMC_NRDCYCLE) >> 16;  in sam9_smc_cs_read()
119 	sam9_smc_cs_read_mode(base, config);  in sam9_smc_cs_read()
122 void sam9_smc_read(int id, int cs, struct sam9_smc_config *config)  in sam9_smc_read()  argument
124 	sam9_smc_cs_read(AT91_SMC_CS(id, cs), config);  in sam9_smc_read()