Lines Matching refs:r3
101 mrc p15, 0, r3, c0, c1, 4 @ read ID_MMFR0
102 and r3, r3, #0xf @ extract VMSA support
103 cmp r3, #5 @ long-descriptor translation table format?
109 adr r3, 2f
110 ldmia r3, {r4, r8}
111 sub r4, r3, r4 @ (PHYS_OFFSET - PAGE_OFFSET)
170 mov r3, #0
172 1: str r3, [r0], #4
173 str r3, [r0], #4
174 str r3, [r0], #4
175 str r3, [r0], #4
185 add r3, r4, #0x1000 @ first PMD table address
186 orr r3, r3, #3 @ PGD block type
192 str r3, [r0], #4 @ set bottom PGD entry bits
194 str r3, [r0], #4 @ set bottom PGD entry bits
197 add r3, r3, #0x1000 @ next PMD table
214 ldmia r0, {r3, r5, r6}
215 sub r0, r0, r3 @ virt->phys offset
221 1: orr r3, r7, r5, lsl #SECTION_SHIFT @ flags + kernel base
222 str r3, [r4, r5, lsl #PMD_ORDER] @ identity mapping
232 orr r3, r8, r7
234 1: str r3, [r0], #1 << PMD_ORDER
235 add r3, r3, #1 << SECTION_SHIFT
244 mov r3, pc
245 mov r3, r3, lsr #SECTION_SHIFT
246 orr r3, r7, r3, lsl #SECTION_SHIFT
248 str r3, [r0, #((XIP_START & 0x00f00000) >> SECTION_SHIFT) << PMD_ORDER]!
253 add r3, r3, #1 << SECTION_SHIFT
254 strls r3, [r0], #1 << PMD_ORDER
264 subne r3, r0, r8
265 addne r3, r3, #PAGE_OFFSET
266 addne r3, r4, r3, lsr #(SECTION_SHIFT - PMD_ORDER)
268 strne r6, [r3], #1 << PMD_ORDER
270 strne r6, [r3]
284 addruart r7, r3, r0
286 mov r3, r3, lsr #SECTION_SHIFT
287 mov r3, r3, lsl #PMD_ORDER
289 add r0, r4, r3
290 mov r3, r7, lsr #SECTION_SHIFT
292 orr r3, r7, r3, lsl #SECTION_SHIFT
297 str r3, [r0], #4
299 str r3, [r0], #4
303 orr r3, r3, #PMD_SECT_XN
304 str r3, [r0], #4
318 orr r3, r7, #0x7c000000
319 str r3, [r0]
328 orr r3, r7, #0x02000000
329 str r3, [r0]
331 str r3, [r0]
474 mrc p15, 0, r3, c0, c0, 0 @ read id reg
476 mov r3, r3
477 mov r3, r13
478 ret r3
487 and r3, r9, #0x000f0000 @ architecture version
488 teq r3, #0x000f0000 @ CPU ID supported?
491 bic r3, r9, #0x00ff0000
492 bic r3, r3, #0x0000000f @ mask 0xff00fff0
496 teq r3, r4 @ ARM 11MPCore?
509 teq r3, r4 @ Check for ARM Cortex-A9