Lines Matching refs:r0
42 mov r0, sp
71 @ The abort handler must return the aborted address in r0, and
95 THUMB( stmia sp, {r0 - r12} )
129 ldmia r0, {r4 - r6}
130 add r0, sp, #S_PC @ here for interlock avoidance
132 str r4, [sp] @ save preserved r0
133 stmia r0, {r5 - r7} @ lr_<exception>,
136 mov r0, sp
152 UNWIND(.save {r0 - pc} )
155 SPFIX( str r0, [sp] ) @ temporarily saved
156 SPFIX( mov r0, sp )
157 SPFIX( tst r0, #4 ) @ test original stack alignment
158 SPFIX( ldr r0, [sp] ) @ restored
165 ldmia r0, {r3 - r5}
170 str r3, [sp, #-4]! @ save the "real" r0 copied
211 ldr r0, [tsk, #TI_FLAGS] @ get flags
213 movne r0, #0 @ force flags to 0
214 tst r0, #_TIF_NEED_RESCHED
228 ldr r0, [tsk, #TI_FLAGS] @ get new tasks TI_FLAGS
229 tst r0, #_TIF_NEED_RESCHED
241 ldr r2, [r0, #S_PC]
243 str r2, [r0, #S_PC]
262 @ r0 - instruction
265 ldr r0, [r4, #-4]
268 ldrh r0, [r4, #-2] @ Thumb instruction at LR - 2
269 cmp r0, #0xe800 @ 32-bit instruction if xx >= 0
274 orr r0, r9, r0, lsl #16
282 mov r0, sp @ struct pt_regs *regs
303 mov r0, sp @ struct pt_regs *regs
333 THUMB( mov r0, #ABT_MODE | PSR_I_BIT | PSR_F_BIT )
334 THUMB( msr cpsr_c, r0 )
338 THUMB( mov r0, #SVC_MODE | PSR_I_BIT | PSR_F_BIT )
339 THUMB( msr cpsr_c, r0 )
342 add r0, sp, #8 @ struct pt_regs *regs
347 THUMB( mov r0, #ABT_MODE | PSR_I_BIT | PSR_F_BIT )
348 THUMB( msr cpsr_c, r0 )
352 THUMB( mov r0, #SVC_MODE | PSR_I_BIT | PSR_F_BIT )
353 THUMB( msr cpsr_c, r0 )
520 3: ldrht r0, [r2]
521 ARM_BE8(rev16 r0, r0) @ little endian instruction
860 ldrd r4, r5, [r0] @ load old val
863 1: ldrexd r0, r1, [r2] @ load current val
864 eors r3, r0, r4 @ compare with oldval (1)
870 rsbs r0, r3, #0 @ set returned val and C flag
885 ldmia r0, {r4, r5} @ load old val
887 1: ldmia r2, {r0, r1} @ load current val
888 eors r3, r0, r4 @ compare with oldval (1)
891 rsbs r0, r3, #0 @ set return val and C flag
914 mov r0, #-1
915 adds r0, r0, #0
1034 * of which is copied into r0 for the mode specific abort handler.
1045 @ Save r0, lr_<exception> (parent PC) and spsr_<exception>
1048 stmia sp, {r0, lr} @ save r0, lr
1055 mrs r0, cpsr
1056 eor r0, r0, #(\mode ^ SVC_MODE | PSR_ISETSTATE)
1057 msr spsr_cxsf, r0
1063 THUMB( adr r0, 1f )
1064 THUMB( ldr lr, [r0, lr, lsl #2] )
1065 mov r0, sp