Lines Matching refs:r5
75 adr r5, 3f
76 ldmia r5, {r0, r6, r7, r8, r11}
77 add r0, r5, r0 @ r0 = mcpm_entry_early_pokes
78 add r6, r5, r6 @ r6 = mcpm_entry_vectors
79 ldr r7, [r5, r7] @ r7 = mcpm_power_up_setup_phys
80 add r8, r5, r8 @ r8 = mcpm_sync
81 add r11, r5, r11 @ r11 = first_man_locks
94 mov r5, #MCPM_SYNC_CPU_SIZE
95 mla r5, r9, r5, r8 @ r5 = sync cpu address
96 strb r0, [r5]
191 strb r0, [r5]
196 ldr r5, [r6, r4, lsl #2] @ r5 = CPU entry vector
197 cmp r5, #0
203 bx r5