Lines Matching refs:clk
15 compatible = "st,stih410-clk", "simple-bus";
20 clk_sysin: clk-sysin {
30 arm_periph_clk: clk-m-a9-periphs {
58 clk_m_a9: clk-m-a9@92b0000 {
72 clk_m_a9_ext2f_div2: clk-m-a9-ext2f-div2s {
78 clock-output-names = "clk-m-a9-ext2f-div2";
92 clock-output-names = "clk-s-icn-reg-0";
99 clk_s_a0_pll: clk-s-a0-pll {
105 clock-output-names = "clk-s-a0-pll-ofd-0";
108 clk_s_a0_flexgen: clk-s-a0-flexgen {
116 clock-output-names = "clk-ic-lmi0",
117 "clk-ic-lmi1";
121 clk_s_c0_quadfs: clk-s-c0-quadfs@9103000 {
128 clock-output-names = "clk-s-c0-fs0-ch0",
129 "clk-s-c0-fs0-ch1",
130 "clk-s-c0-fs0-ch2",
131 "clk-s-c0-fs0-ch3";
138 clk_s_c0_pll0: clk-s-c0-pll0 {
144 clock-output-names = "clk-s-c0-pll0-odf-0";
147 clk_s_c0_pll1: clk-s-c0-pll1 {
153 clock-output-names = "clk-s-c0-pll1-odf-0";
156 clk_s_c0_flexgen: clk-s-c0-flexgen {
168 clock-output-names = "clk-icn-gpu",
169 "clk-fdma",
170 "clk-nand",
171 "clk-hva",
172 "clk-proc-stfe",
173 "clk-proc-tp",
174 "clk-rx-icn-dmu",
175 "clk-rx-icn-hva",
176 "clk-icn-cpu",
177 "clk-tx-icn-dmu",
178 "clk-mmc-0",
179 "clk-mmc-1",
180 "clk-jpegdec",
181 "clk-ext2fa9",
182 "clk-ic-bdisp-0",
183 "clk-ic-bdisp-1",
184 "clk-pp-dmu",
185 "clk-vid-dmu",
186 "clk-dss-lpc",
187 "clk-st231-aud-0",
188 "clk-st231-gp-1",
189 "clk-st231-dmu",
190 "clk-icn-lmi",
191 "clk-tx-icn-disp-1",
192 "clk-icn-sbc",
193 "clk-stfe-frc2",
194 "clk-eth-phy",
195 "clk-eth-ref-phyclk",
196 "clk-flash-promip",
197 "clk-main-disp",
198 "clk-aux-disp",
199 "clk-compo-dvp",
200 "clk-tx-icn-hades",
201 "clk-rx-icn-hades",
202 "clk-icn-reg-16",
203 "clk-pp-hades",
204 "clk-clust-hades",
205 "clk-hwpe-hades",
206 "clk-fc-hades";
210 clk_s_d0_quadfs: clk-s-d0-quadfs@9104000 {
217 clock-output-names = "clk-s-d0-fs0-ch0",
218 "clk-s-d0-fs0-ch1",
219 "clk-s-d0-fs0-ch2",
220 "clk-s-d0-fs0-ch3";
227 clk_s_d0_flexgen: clk-s-d0-flexgen {
237 clock-output-names = "clk-pcm-0",
238 "clk-pcm-1",
239 "clk-pcm-2",
240 "clk-spdiff",
241 "clk-pcmr10-master",
242 "clk-usb2-phy";
246 clk_s_d2_quadfs: clk-s-d2-quadfs@9106000 {
253 clock-output-names = "clk-s-d2-fs0-ch0",
254 "clk-s-d2-fs0-ch1",
255 "clk-s-d2-fs0-ch2",
256 "clk-s-d2-fs0-ch3";
259 clk_tmdsout_hdmi: clk-tmdsout-hdmi {
269 clk_s_d2_flexgen: clk-s-d2-flexgen {
281 clock-output-names = "clk-pix-main-disp",
282 "clk-pix-pip",
283 "clk-pix-gdp1",
284 "clk-pix-gdp2",
285 "clk-pix-gdp3",
286 "clk-pix-gdp4",
287 "clk-pix-aux-disp",
288 "clk-denc",
289 "clk-pix-hddac",
290 "clk-hddac",
291 "clk-sddac",
292 "clk-pix-dvo",
293 "clk-dvo",
294 "clk-pix-hdmi",
295 "clk-tmds-hdmi",
296 "clk-ref-hdmiphy";
300 clk_s_d3_quadfs: clk-s-d3-quadfs@9107000 {
307 clock-output-names = "clk-s-d3-fs0-ch0",
308 "clk-s-d3-fs0-ch1",
309 "clk-s-d3-fs0-ch2",
310 "clk-s-d3-fs0-ch3";
317 clk_s_d3_flexgen: clk-s-d3-flexgen {
327 clock-output-names = "clk-stfe-frc1",
328 "clk-tsout-0",
329 "clk-tsout-1",
330 "clk-mchi",
331 "clk-vsens-compo",
332 "clk-frc1-remote",
333 "clk-lpc-0",
334 "clk-lpc-1";