Lines Matching refs:CLK_A
181 txd0 = <&pio0 0 ALT1 OUT DE_IO 0 CLK_A>;
182 txd1 = <&pio0 1 ALT1 OUT DE_IO 0 CLK_A>;
183 txd2 = <&pio0 2 ALT1 OUT DE_IO 0 CLK_A>;
184 txd3 = <&pio0 3 ALT1 OUT DE_IO 0 CLK_A>;
185 txen = <&pio0 5 ALT1 OUT DE_IO 0 CLK_A>;
186 txclk = <&pio0 6 ALT1 IN NICLK 0 CLK_A>;
187 rxd0 = <&pio1 4 ALT1 IN DE_IO 0 CLK_A>;
188 rxd1 = <&pio1 5 ALT1 IN DE_IO 0 CLK_A>;
189 rxd2 = <&pio1 6 ALT1 IN DE_IO 0 CLK_A>;
190 rxd3 = <&pio1 7 ALT1 IN DE_IO 0 CLK_A>;
191 rxdv = <&pio2 0 ALT1 IN DE_IO 0 CLK_A>;
192 rxclk = <&pio2 2 ALT1 IN NICLK 500 CLK_A>;
193 clk125 = <&pio3 7 ALT4 IN NICLK 0 CLK_A>;
201 mdc = <&pio1 1 ALT1 OUT NICLK 0 CLK_A>;
208 txd0 = <&pio0 0 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
209 txd1 = <&pio0 1 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
210 txd2 = <&pio0 2 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
211 txd3 = <&pio0 3 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
212 txer = <&pio0 4 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
213 txen = <&pio0 5 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
214 txclk = <&pio0 6 ALT1 IN NICLK 0 CLK_A>;
218 mdc = <&pio1 1 ALT1 OUT NICLK 0 CLK_A>;
221 rxd0 = <&pio1 4 ALT1 IN SE_NICLK_IO 0 CLK_A>;
222 rxd1 = <&pio1 5 ALT1 IN SE_NICLK_IO 0 CLK_A>;
223 rxd2 = <&pio1 6 ALT1 IN SE_NICLK_IO 0 CLK_A>;
224 rxd3 = <&pio1 7 ALT1 IN SE_NICLK_IO 0 CLK_A>;
226 rxdv = <&pio2 0 ALT1 IN SE_NICLK_IO 0 CLK_A>;
227 rx_er = <&pio2 1 ALT1 IN SE_NICLK_IO 0 CLK_A>;
228 rxclk = <&pio2 2 ALT1 IN NICLK 0 CLK_A>;
229 phyclk = <&pio2 3 ALT1 OUT NICLK 0 CLK_A>;