Lines Matching refs:clocks
52 clocks = <&cru ACLK_DMA1>;
62 clocks = <&cru ACLK_DMA1>;
73 clocks = <&cru ACLK_DMA2>;
101 clocks = <&cru CORE_PERI>;
108 clocks = <&cru CORE_PERI>;
126 clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
137 clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
145 clocks = <&cru HCLK_OTG0>;
154 clocks = <&cru HCLK_OTG1>;
168 clocks = <&cru HCLK_EMAC>, <&cru SCLK_MAC>;
180 clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>;
190 clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>;
200 clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>;
226 clocks = <&cru PCLK_I2C0>;
240 clocks = <&cru PCLK_I2C1>;
250 clocks = <&cru PCLK_PWM01>;
258 clocks = <&cru PCLK_PWM01>;
265 clocks = <&cru PCLK_WDT>;
274 clocks = <&cru PCLK_PWM23>;
282 clocks = <&cru PCLK_PWM23>;
295 clocks = <&cru PCLK_I2C2>;
310 clocks = <&cru PCLK_I2C3>;
325 clocks = <&cru PCLK_I2C4>;
338 clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
349 clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>;
358 clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
365 clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
378 clocks = <&cru SCLK_SPI1>, <&cru PCLK_SPI1>;