Lines Matching refs:clks
58 clocks = <&clks IMX6SL_CLK_ARM>, <&clks IMX6SL_CLK_PLL2_PFD2>,
59 <&clks IMX6SL_CLK_STEP>, <&clks IMX6SL_CLK_PLL1_SW>,
60 <&clks IMX6SL_CLK_PLL1_SYS>;
105 clocks = <&clks IMX6SL_CLK_OCRAM>;
148 clocks = <&clks IMX6SL_CLK_ECSPI1>,
149 <&clks IMX6SL_CLK_ECSPI1>;
160 clocks = <&clks IMX6SL_CLK_ECSPI2>,
161 <&clks IMX6SL_CLK_ECSPI2>;
172 clocks = <&clks IMX6SL_CLK_ECSPI3>,
173 <&clks IMX6SL_CLK_ECSPI3>;
184 clocks = <&clks IMX6SL_CLK_ECSPI4>,
185 <&clks IMX6SL_CLK_ECSPI4>;
195 clocks = <&clks IMX6SL_CLK_UART>,
196 <&clks IMX6SL_CLK_UART_SERIAL>;
208 clocks = <&clks IMX6SL_CLK_UART>,
209 <&clks IMX6SL_CLK_UART_SERIAL>;
221 clocks = <&clks IMX6SL_CLK_UART>,
222 <&clks IMX6SL_CLK_UART_SERIAL>;
235 clocks = <&clks IMX6SL_CLK_SSI1_IPG>,
236 <&clks IMX6SL_CLK_SSI1>;
251 clocks = <&clks IMX6SL_CLK_SSI2_IPG>,
252 <&clks IMX6SL_CLK_SSI2>;
267 clocks = <&clks IMX6SL_CLK_SSI3_IPG>,
268 <&clks IMX6SL_CLK_SSI3>;
282 clocks = <&clks IMX6SL_CLK_UART>,
283 <&clks IMX6SL_CLK_UART_SERIAL>;
295 clocks = <&clks IMX6SL_CLK_UART>,
296 <&clks IMX6SL_CLK_UART_SERIAL>;
309 clocks = <&clks IMX6SL_CLK_PWM1>,
310 <&clks IMX6SL_CLK_PWM1>;
319 clocks = <&clks IMX6SL_CLK_PWM2>,
320 <&clks IMX6SL_CLK_PWM2>;
329 clocks = <&clks IMX6SL_CLK_PWM3>,
330 <&clks IMX6SL_CLK_PWM3>;
339 clocks = <&clks IMX6SL_CLK_PWM4>,
340 <&clks IMX6SL_CLK_PWM4>;
348 clocks = <&clks IMX6SL_CLK_GPT>,
349 <&clks IMX6SL_CLK_GPT_SERIAL>;
412 clocks = <&clks IMX6SL_CLK_DUMMY>;
420 clocks = <&clks IMX6SL_CLK_DUMMY>;
427 clocks = <&clks IMX6SL_CLK_DUMMY>;
431 clks: ccm@020c4000 { label
547 clocks = <&clks IMX6SL_CLK_PLL3_USB_OTG>;
554 clocks = <&clks IMX6SL_CLK_USBPHY1>;
562 clocks = <&clks IMX6SL_CLK_USBPHY2>;
612 clocks = <&clks IMX6SL_CLK_GPU2D_OVG>,
613 <&clks IMX6SL_CLK_GPU2D_PODF>;
642 clocks = <&clks IMX6SL_CLK_SDMA>,
643 <&clks IMX6SL_CLK_SDMA>;
664 clocks = <&clks IMX6SL_CLK_LCDIF_PIX>,
665 <&clks IMX6SL_CLK_LCDIF_AXI>,
666 <&clks IMX6SL_CLK_DUMMY>;
688 clocks = <&clks IMX6SL_CLK_USBOH3>;
698 clocks = <&clks IMX6SL_CLK_USBOH3>;
708 clocks = <&clks IMX6SL_CLK_USBOH3>;
718 clocks = <&clks IMX6SL_CLK_USBOH3>;
725 clocks = <&clks IMX6SL_CLK_ENET>,
726 <&clks IMX6SL_CLK_ENET_REF>;
735 clocks = <&clks IMX6SL_CLK_USDHC1>,
736 <&clks IMX6SL_CLK_USDHC1>,
737 <&clks IMX6SL_CLK_USDHC1>;
747 clocks = <&clks IMX6SL_CLK_USDHC2>,
748 <&clks IMX6SL_CLK_USDHC2>,
749 <&clks IMX6SL_CLK_USDHC2>;
759 clocks = <&clks IMX6SL_CLK_USDHC3>,
760 <&clks IMX6SL_CLK_USDHC3>,
761 <&clks IMX6SL_CLK_USDHC3>;
771 clocks = <&clks IMX6SL_CLK_USDHC4>,
772 <&clks IMX6SL_CLK_USDHC4>,
773 <&clks IMX6SL_CLK_USDHC4>;
785 clocks = <&clks IMX6SL_CLK_I2C1>;
795 clocks = <&clks IMX6SL_CLK_I2C2>;
805 clocks = <&clks IMX6SL_CLK_I2C3>;