Lines Matching refs:clocks

49 	clocks {
73 			clocks = <&clks IMX27_CLK_CPU_DIV>;
96 				clocks = <&clks IMX27_CLK_DMA_IPG_GATE>,
107 				clocks = <&clks IMX27_CLK_WDOG_IPG_GATE>;
114 				clocks = <&clks IMX27_CLK_GPT1_IPG_GATE>,
123 				clocks = <&clks IMX27_CLK_GPT2_IPG_GATE>,
132 				clocks = <&clks IMX27_CLK_GPT3_IPG_GATE>,
142 				clocks = <&clks IMX27_CLK_PWM_IPG_GATE>,
151 				clocks = <&clks IMX27_CLK_KPP_IPG_GATE>;
158 				clocks = <&clks IMX27_CLK_OWIRE_IPG_GATE>;
166 				clocks = <&clks IMX27_CLK_UART1_IPG_GATE>,
176 				clocks = <&clks IMX27_CLK_UART2_IPG_GATE>,
186 				clocks = <&clks IMX27_CLK_UART3_IPG_GATE>,
196 				clocks = <&clks IMX27_CLK_UART4_IPG_GATE>,
208 				clocks = <&clks IMX27_CLK_CSPI1_IPG_GATE>,
220 				clocks = <&clks IMX27_CLK_CSPI2_IPG_GATE>,
231 				clocks = <&clks IMX27_CLK_SSI1_IPG_GATE>;
243 				clocks = <&clks IMX27_CLK_SSI2_IPG_GATE>;
256 				clocks = <&clks IMX27_CLK_I2C1_IPG_GATE>;
264 				clocks = <&clks IMX27_CLK_SDHC1_IPG_GATE>,
276 				clocks = <&clks IMX27_CLK_SDHC2_IPG_GATE>,
294 					clocks = <&clks IMX27_CLK_GPIO_IPG_GATE>;
305 					clocks = <&clks IMX27_CLK_GPIO_IPG_GATE>;
316 					clocks = <&clks IMX27_CLK_GPIO_IPG_GATE>;
327 					clocks = <&clks IMX27_CLK_GPIO_IPG_GATE>;
338 					clocks = <&clks IMX27_CLK_GPIO_IPG_GATE>;
349 					clocks = <&clks IMX27_CLK_GPIO_IPG_GATE>;
361 				clocks = <&clks IMX27_CLK_DUMMY>;
372 				clocks = <&clks IMX27_CLK_CSPI3_IPG_GATE>,
382 				clocks = <&clks IMX27_CLK_GPT4_IPG_GATE>,
391 				clocks = <&clks IMX27_CLK_GPT5_IPG_GATE>,
400 				clocks = <&clks IMX27_CLK_UART5_IPG_GATE>,
410 				clocks = <&clks IMX27_CLK_UART6_IPG_GATE>,
422 				clocks = <&clks IMX27_CLK_I2C2_IPG_GATE>;
430 				clocks = <&clks IMX27_CLK_SDHC3_IPG_GATE>,
442 				clocks = <&clks IMX27_CLK_GPT6_IPG_GATE>,
459 				clocks = <&clks IMX27_CLK_LCDC_IPG_GATE>,
470 				clocks = <&clks IMX27_CLK_VPU_BAUD_GATE>,
480 				clocks = <&clks IMX27_CLK_USB_IPG_GATE>,
492 				clocks = <&clks IMX27_CLK_USB_IPG_GATE>,
505 				clocks = <&clks IMX27_CLK_USB_IPG_GATE>,
524 				clocks = <&clks IMX27_CLK_SAHARA_IPG_GATE>,
539 				clocks = <&clks IMX27_CLK_IIM_IPG_GATE>;
546 				clocks = <&clks IMX27_CLK_FEC_IPG_GATE>,
559 			clocks = <&clks IMX27_CLK_NFC_BAUD_GATE>;
568 			clocks = <&clks IMX27_CLK_EMI_AHB_GATE>;