Lines Matching refs:assigned

53 		assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
57 		assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
59 		assigned-clock-rates = <0>,
124 			assigned-clocks = <&clock CLK_MOUT_FIMC0>,
126 			assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
127 			assigned-clock-rates = <0>, <176000000>;
132 			assigned-clocks = <&clock CLK_MOUT_FIMC1>,
134 			assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
135 			assigned-clock-rates = <0>, <176000000>;
140 			assigned-clocks = <&clock CLK_MOUT_FIMC2>,
142 			assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
143 			assigned-clock-rates = <0>, <176000000>;
148 			assigned-clocks = <&clock CLK_MOUT_FIMC3>,
150 			assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
151 			assigned-clock-rates = <0>, <176000000>;