Lines Matching refs:r9
99 kphex r9, 8 /* decompressed kernel end */
144 AR_CLASS( mrs r9, cpsr )
165 msr spsr_cxsf, r9 @ Save the CPU boot mode in
237 ldrb r9, [r10, #0]
239 orr r9, r9, lr, lsl #8
242 orr r9, r9, lr, lsl #16
243 orr r9, r9, r10, lsl #24
355 addhi r9, r9, r1
391 add r10, r4, r9
392 adr r9, wont_overwrite
393 cmp r10, r9
429 sub r9, r6, r5 @ size to copy
430 add r9, r9, #31 @ rounded up to a multiple
431 bic r9, r9, #31 @ ... of 32 bytes
432 add r6, r9, r5
433 add r9, r9, r10
437 stmdb r9!, {r0 - r3, r10 - r12, lr}
441 sub r6, r9, r6
688 mov r9, r0, lsr #18
689 mov r9, r9, lsl #18 @ start of RAM
690 add r10, r9, #0x10000000 @ a reasonable RAM size
694 1: cmp r1, r9 @ if virt > start of RAM
839 mrc p15, 0, r9, c0, c0 @ get processor ID
851 ldr r9, =CONFIG_PROCESSOR_ID
855 eor r1, r1, r9 @ (real ^ match)
1154 stmfd sp!, {r0-r7, r9-r11}
1177 mov r9, r4 @ create working copy of max way size
1179 ARM( orr r11, r10, r9, lsl r5 ) @ factor way and cache number into r11
1181 THUMB( lsl r6, r9, r5 )
1186 subs r9, r9, #1 @ decrement the way
1195 ldmfd sp!, {r0-r7, r9-r11}
1220 teq r3, r9 @ cache ID register present?