34 	p->ainsn.is_short = is_short_instr((unsigned long)p->addr);  in arch_prepare_kprobe()
61 	if (p->ainsn.t1_addr) {  in arch_remove_kprobe()
62 		*(p->ainsn.t1_addr) = p->ainsn.t1_opcode;  in arch_remove_kprobe()
64 		flush_icache_range((unsigned long)p->ainsn.t1_addr,  in arch_remove_kprobe()
65 				   (unsigned long)p->ainsn.t1_addr +  in arch_remove_kprobe()
68 		p->ainsn.t1_addr = NULL;  in arch_remove_kprobe()
71 	if (p->ainsn.t2_addr) {  in arch_remove_kprobe()
72 		*(p->ainsn.t2_addr) = p->ainsn.t2_opcode;  in arch_remove_kprobe()
74 		flush_icache_range((unsigned long)p->ainsn.t2_addr,  in arch_remove_kprobe()
75 				   (unsigned long)p->ainsn.t2_addr +  in arch_remove_kprobe()
78 		p->ainsn.t2_addr = NULL;  in arch_remove_kprobe()
105 	if (p->ainsn.t1_addr) {  in resume_execution()
106 		*(p->ainsn.t1_addr) = p->ainsn.t1_opcode;  in resume_execution()
108 		flush_icache_range((unsigned long)p->ainsn.t1_addr,  in resume_execution()
109 				   (unsigned long)p->ainsn.t1_addr +  in resume_execution()
112 		p->ainsn.t1_addr = NULL;  in resume_execution()
115 	if (p->ainsn.t2_addr) {  in resume_execution()
116 		*(p->ainsn.t2_addr) = p->ainsn.t2_opcode;  in resume_execution()
118 		flush_icache_range((unsigned long)p->ainsn.t2_addr,  in resume_execution()
119 				   (unsigned long)p->ainsn.t2_addr +  in resume_execution()
122 		p->ainsn.t2_addr = NULL;  in resume_execution()
156 		if (!p->ainsn.is_short) {  in setup_singlestep()
177 	p->ainsn.t1_addr = (kprobe_opcode_t *) next_pc;  in setup_singlestep()
178 	p->ainsn.t1_opcode = *(p->ainsn.t1_addr);  in setup_singlestep()
179 	*(p->ainsn.t1_addr) = TRAP_S_2_INSTRUCTION;  in setup_singlestep()
181 	flush_icache_range((unsigned long)p->ainsn.t1_addr,  in setup_singlestep()
182 			   (unsigned long)p->ainsn.t1_addr +  in setup_singlestep()
186 		p->ainsn.t2_addr = (kprobe_opcode_t *) tgt_if_br;  in setup_singlestep()
187 		p->ainsn.t2_opcode = *(p->ainsn.t2_addr);  in setup_singlestep()
188 		*(p->ainsn.t2_addr) = TRAP_S_2_INSTRUCTION;  in setup_singlestep()
190 		flush_icache_range((unsigned long)p->ainsn.t2_addr,  in setup_singlestep()
191 				   (unsigned long)p->ainsn.t2_addr +  in setup_singlestep()