Lines Matching refs:IRQ

150 ;##################### Scratch Mem for IRQ stack switching #############
200 	; if L2 IRQ interrupted a L1 ISR, disable preemption
204 	bbit0 r9, STATUS_A1_BIT, 1f     ; L1 not active when L2 IRQ, so normal
562 	; interim IRQ).
584 	; Normal Trap/IRQ entry only saves Scratch (caller-saved) regs
636 	; preempt_schedule_irq() always returns with IRQ disabled
643 ; Restore the saved sys context (common exit-path for EXCPN/IRQ/Trap)
644 ; IRQ shd definitely not happen between now and rtie
654 	; use the same priorty as rtie: EXCPN, L2 IRQ, L1 IRQ, None
681 	; if L2 IRQ interrupted an L1 ISR,  we'd disabled preemption earlier
688 	bbit0 r9, STATUS_A1_BIT, 149f  ; L1 not active when L2 IRQ, so normal