Lines Matching refs:pipe

80 elementary data transport between an FPGA and the host, providing pipe-like
93 just like any pipe file. On the FPGA side, hardware FIFOs are used to stream
119 and use plain write() or read() calls, just like with a regular pipe. In
146 asynchronous. For a synchronous pipe, write() returns successfully only after
152 When a pipe is configured asynchronous, write() returns if there was enough
173 A synchronous pipe can be configured to have the stream's position exposed
174 to the user logic at the FPGA. Such a pipe is also seekable on the host API.
200 Each pipe has a number of attributes which are set when the FPGA component
205 * is_writebuf: The pipe's direction. A non-zero value means it's an FPGA to
206   host pipe (the FPGA "writes").
208 * channelnum: The pipe's identification number in communication between the
217 * synchronous: A non-zero value means that the pipe is synchronous. See
222 * bufnum: The number of buffers allocated for this pipe. Always a power of two.
228 * seekable: A non-zero value indicates that the pipe is seekable. See
233   poll() for this pipe.
263 related messages from the FPGA, and has no pipe attached to it.
312 to hide this when the pipe is accessed differently from its natural alignment.
313 For example, reading single bytes from a pipe with 32 bit granularity works