Lines Matching refs:pages
52 pages, pae, pse, pse36, cr0.wp, and 1GB pages. Work is in progress to support
102 Shadow pages
109 A nonleaf spte allows the hardware mmu to reach the leaf pages and
110 is not related to a translation directly. It points to other shadow pages.
115 Leaf ptes point at guest pages.
131 Shadow pages contain the following information:
137 Examples include real mode translation, large guest pages backed by small
138 host pages, and gpa->hpa translations when NPT or EPT is active.
147 so multiple shadow pages are needed to shadow one guest page.
148 For first-level shadow pages, role.quadrant can be 0 or 1 and denotes the
152 shadow pages) so role.quadrant takes values in the range 0..3. Each
170 (pages for which this is true are different from other pages; see the
174 (pages for which this is true are different from other pages; see the
184 sptes in spt point either at guest pages, or at lower-level shadow pages.
185 Specifically, if sp1 and sp2 are shadow pages, then sp1->spt[n] may point
188 guest pages as leaves.
200 parent_ptes bit 0 is zero, only one spte points at this pages and
209 other means. Valid for leaf pages.
211 How many sptes in the page point at pages that are unsync (or have
215 pages that may be unsynchronized. Used to quickly locate all unsychronized
216 pages reachable from a given page.
219 during hash table lookup, and used to skip invalidated shadow pages (see
220 "Zapping all pages" below.)
229 and unsynchronized pages" below). Leaf pages can be unsynchronized
242 Synchronized and unsynchronized pages
262 pages on a tlb flush.
275 - when logging dirty pages, memory is write protected
276 - synchronized shadow pages are write protected (*)
319 - synchronize newly reachable shadow pages
324 - synchronize newly reachable shadow pages
372 Large pages
375 The mmu supports all combinations of large and small guest and host pages.
376 Supported page sizes include 4k, 2M, 4M, and 1G. 4M pages are treated as
377 two separate 2M pages, on both guest and host, since the mmu always uses PAE
386 write-protected pages
395 Zapping all pages (page generation count)
398 For the large memory guests, walking and zapping all pages is really slow
399 (because there are a lot of pages), and also blocks memory accesses of
407 When KVM need zap all shadow pages sptes, it just simply increases the global
408 generation-number then reload root shadow pages on all vcpus. As the VCPUs
409 create new shadow page tables, the old pages are not used because of the
412 KVM then walks through all pages and zaps obsolete pages. While the zap
423 shadow pages, and is made more scalable with a similar technique.
437 pages are zapped when there is an overflow.