Lines Matching refs:D0

81 The PCI PM Spec defines 4 operating states for devices (D0-D3) and for buses
84 the device or bus to return to the full-power state (D0 or B0, respectively).
97 Note that every PCI device can be in the full-power state (D0) or in D3cold,
100 as well as D0.  The support for the D1 and D2 power states is optional.
107 programmatically put into D0.  Thus the kernel can switch the device back and
108 forth between D0 and the supported low-power states (except for D3cold) and the
114 | D0            | D1, D2, D3 |
120 | D1, D2, D3    | D0         |
123 The transition from D3cold to D0 occurs when the supply voltage is provided to
124 the device (i.e. power is restored).  In that case the device returns to D0 with
161 labeled as D0, D1, D2, and D3 that roughly correspond to the native PCI PM
162 D0-D3 states (although the difference between D3hot and D3cold is not taken
179 only be put into D0 this way.
316 	unsigned int	d3_delay;	/* D3->D0 transition time in ms */