Lines Matching refs:at

42 descriptor pointer (GDACTDPA). The GDACTDPA points at the descr
51 hardware is ahead, the tail pointer will be pointing at a "full"
61 When traffic is flowing, then the head pointer will be pointing at
69 pointer, at which point the OS will notice that the head descr is
73 all be pointing at the same descr, which should be "empty". All of the
78 of the ring, starting at the tail pointer, and listing the status
84 net eth1: Chain tail located at descr=20
85 net eth1: Chain head is at 20
86 net eth1: HW curr desc (GDACTDPA) is at 21
88 net eth1: HW next desc (GDACNEXTDA) is at 22
92 head and tail are pointing at 20, because it has not yet been emptied.
93 Meanwhile, hw is pointing at 21, which is free.
95 The "Have nnn decrs" refers to the descr starting at the tail: in this
96 case, nnn=1 descr, starting at descr 20. The "Last nnn descrs" refers
114 As long as the OS can empty out the RX buffers at a rate faster than
129 descriptor is invalid, it will not restart at that descriptor; instead
130 it will restart at the next descr. This potentially will lead to a
131 deadlock condition, as the tail pointer will be pointing at this descr,
139 A call to show_rx_chain() at this point indicates the nature of the
144 net eth1: Chain tail located at descr=255
145 net eth1: Chain head is at 255
146 net eth1: HW curr desc (GDACTDPA) is at 0
148 net eth1: HW next desc (GDACNEXTDA) is at 1
154 Both the tail and head pointers are pointing at descr 255, which is
161 The HW pointer is at descr 0. This descr is marked 0x4.. or "full".
165 descr 254, since tail was at 255.) Thus, the system is deadlocked,