Lines Matching refs:that
15 entities that will be doing the copy, and requests what endpoints are
21 asserting that request line.
33 that requires data to be written exactly 16 or 24 bits at a time. This
41 using a parameter called the burst size, that defines how many single
46 that involve a single contiguous block of data. However, some of the
53 quite simple DMA controller that doesn't support it, and we'll have to
55 that implements in hardware scatter-gather.
59 over that collection, doing whatever we programmed there.
74 The one last thing is that usually, slave devices won't issue DRQ by
80 support other kind of transfers or memory operations that dmaengine
93 accommodates that API in some cases, and made some design choices to
94 ensure that it stayed compatible.
107 framework. In our case, that structure is dma_device.
132 reporting. The framework will only know that a particular
150 Our dma_device structure has a field called cap_mask that holds the
179 - The device is able to trigger a dummy transfer that will
181 - Used by the client drivers to register a callback that will be
205 we just have a single transaction type that is supposed to
215 on a single ring buffer that you will fill with your audio data.
220 to a non-contiguous buffer, opposed to DMA_SLAVE that can
239 order to implement the actual logic, now that we described what
242 The functions that we have to fill in there, and hence have to
250 time on the channel associated to that driver.
252 resources in order for that channel to be useful for your
271 dma_async_tx_descriptor structure, that further represents this
282 that is supposed to push the current
288 and starts the transfer. Whenever that transfer is done, it
308 structure pointer as an argument, that will detail which
310 - Even though that structure contains a direction field, this
333 Misc notes (stuff that should be documented, but don't really know
339 - Makes sure that dependent operations are run before marking it
343 - it's a DMA transaction ID that will increment over time.
345 that abstracts it away.
358 that handles the end of transfer interrupts in the handler, but defer
368 transfer in your tasklet, move that part to the interrupt handler in
369 order to have a shorter idle window (that we can't really avoid
376 that can be queued to buffers before being flushed to