Lines Matching refs:PHY

1 Tegra SOC USB PHY
3 The device node for Tegra SOC USB PHY:
11    - The PHY's own register set.
13    - The register set of the PHY containing the UTMI pad control registers.
18    - reg: The clock needed to access the PHY's own registers. This is the
24    - ulpi-link: The clock Tegra provides to the ULPI PHY (cdev2).
29    - usb: The PHY's own reset signal.
30    - utmi-pads: The reset of the PHY containing the chip-wide UTMI pad control
34   - nvidia,phy-reset-gpio : The GPIO used to reset the PHY.
36 Required PHY timing params for utmi phy, for all chips:
51 Required PHY timing params for utmi phy, only on Tegra30 and above:
63   - dr_mode : dual role mode. Indicates the working mode for the PHY. Can be