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5 The PAMU is an I/O MMU that provides device-to-memory access control and
18 		  PAMU v1.0, on an SOC that has five PAMU devices, the size
44 		  a bitmask which selects the bits that should be set if
49 Each child node represents one PAMU controller.  Each SOC device that is
51 that links to the corresponding specific child PAMU controller.
61 		  Two cells that specify the geometry of the primary PAMU
67 		  Two cells that specify the geometry of the secondary PAMU
74 Devices that have LIODNs need to specify links to the parent PAMU controller
75 (the actual PAMU controller that this device is connected to) and a pointer to
82 		the device tree to assist code that dynamically determines the
86 		  Two cells that specify the location of the LIODN register
87 		  for this device.  Required for devices that have a single
88 		  LIODN.  The first cell is a phandle to a node that contains